Highly Skilled ASIC Design Test Engineer
1 day ago
We are seeking a highly skilled ASIC Design Test Engineer to join our team at Cisco Systems, Inc. in Milpitas/San Jose office location.
About the Role:
The Common Hardware Group (CHG) delivers silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. We design networking hardware for Enterprises and Service Providers worldwide. Our focus is on delivering innovative solutions that shape the future of networking.
Your Responsibilities:
- Implement hardware Design-for-Test (DFT) features that support ATE, in-system test, debug, and diagnostics needs of designs.
- Develop innovative DFT IP in collaboration with multi-functional teams, driving full chip design integration with testability features coordinated in the RTL.
- Work closely with design/design-verification and PD teams to enable integration and validation of Test logic in all phases of implementation and post-silicon validation flows.
About You:
We require a Bachelor's or Master's Degree in Electrical or Computer Engineering with at least 6 years of experience. Prior experience with Jtag protocols, Scan and BIST architectures, including memory BIST and boundary scan, is essential. Familiarity with ATPG and EDA tools like TestMax, Tetramax, Tessent tool sets, PrimeTime is also required.
Why Choose Us:
Cisco Silicon One is the only unifying silicon architecture in the market, enabling customers to deploy best-of-breed silicon from Top of Rack (TOR) switches to web scale data centers and across service provider, enterprise networks, and data centers. Join us to shape groundbreaking solutions by designing, developing, and testing complex ASICs.
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