FPGA Design Engineer

5 days ago


Santa Clara, California, United States Arista Networks Full time
About the Role

We are seeking a highly skilled FPGA Design Engineer to join our team at Arista Networks. As a key member of our FPGA Design Team, you will be responsible for designing and verifying complex digital circuits, including test benches, simulators, and FPGA RTL code.

Key Responsibilities
  • Create and maintain test benches in Verilog/SystemVerilog
  • Develop BFM, RTL models for new and existing designs
  • Develop verification test plans and test cases
  • Review design functional coverage
Requirements
  • 2-4 years of experience designing Verilog/SystemVerilog RTL code
  • Proficient in design verification tools and languages (SystemVerilog, SVA, Modelsim, Perl, Python, Unix shell scripts)
  • Experience in chip-level verification environment setups, code/functional coverage collection
  • Motivated, passionate, with a sense of urgency and commitment to achieve targeted goals
  • Strong scripting, debugging, and problem-solving skills
  • Excellent in-person, video, and written communication skills
What We Offer
  • New hire base pay with a salary range of $130,000 to $180,000
  • Discretionary Arista bonuses, commissions, equity, and benefits
About Arista Networks

Arista Networks is an industry leader in data-driven, client-to-cloud networking for large data center, campus, and routing environments. We value diversity of thought and perspectives, fostering an inclusive environment where individuals from various backgrounds and experiences feel welcome.



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