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Senior Verification Engineer

2 months ago

Santa Clara, California, United States Achronix Semiconductor Full time

About the Role:

Achronix Semiconductor is seeking a highly skilled Verification Engineer to contribute to the development of FPGA cores and related ASIC subsystems. As a key member of our team, you will be responsible for verifying and validating FPGA cores and ASIC subsystems implemented in modern FPGA technology nodes (7nm and below).

Key Responsibilities:

  • Verify ASIC logic subsystems developed for high-speed networking and data center applications for inclusion in modern FPGAs.
  • Define, draft, and review verification documents and test plans in collaboration with the design team.
  • Create automated processes for both block- and system-level development and verification.
  • Implement functional coverage and enhance the testbench to ensure coverage closure.
  • Contribute to customer deliverables related to verification and device modeling.
  • Collaborate with internal and external team members on architectural decisions, development flows, and methodologies.
  • Contribute to device bring-up and post-silicon validation.

Requirements:

  • Experience with modern pre-silicon verification techniques, especially including SystemVerilog, UVM, constraint-random, and functional coverage methodologies.
  • Complete understanding of verification life cycle and ability to create and execute comprehensive verification plans.
  • Working knowledge of AXI, PCIe, CXL, Ethernet, DDR, or HBM.
  • Experience with scripting languages such as Python, Tcl, or Perl.
  • Strong technical writing and communication (verbal) skills.

Preferred Qualifications:

  • Knowledge and familiarity with FPGA design flows including FPGA synthesis, place and route, timing closure, and debug tools.

Education and Experience:

  • A minimum of 7 years of experience.
  • Bachelor or Master's degree in Computer or Electrical Engineering.