Senior RTL Design Engineer
3 months ago
Responsibilities: • Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators. • Microarchitecture development and specification. Ensure that knowledge is shared via great documentation and participation in a culture of collaborative design. • Perform initial sandbox verification, and work with design verification team to create and execute thorough verification test plans. • Work with physical implementation team to implement and optimize physical design to meet frequency, area, power goals. • Collaborate with performance modelling team for performance exploration and optimization to meet performance goals. Requirements: • 8+ yrs of recent industry experience in high-performance, energy-efficient CPU designs. • Expertise in CPU processor designs in one or more of the following areas: instruction fetch and decode; branch prediction; register renaming and instruction scheduling; scalar and/or vector execution units; load-store unit; cache and memory subsystems. • Knowledge of RISC-V architecture is a plus. • Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL. • Experience with Scala and/or Chisel is a plus. • Attention to detail and a focus on high-quality design. • Ability to work well with others and a belief that engineering is a team sport. • Knowledge of at least one object-oriented and/or functional programming language. • Background of successful CPU development from architecture through tapeout. • MS/ PhD degree in EE, CE, CS or a related technical discipline, or equivalent experience.
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Senior RTL Design Engineer
2 days ago
Sunnyvale, California, United States Amazon Full timeAbout the RoleWe are seeking a highly skilled Senior RTL Design Engineer to join our advanced architecture team at Amazon. As a key member of our team, you will be responsible for defining the micro-architecture and implementing the corresponding RTL for advanced functional blocks.Key ResponsibilitiesDesign and implement complex hardware and software...
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Senior RTL Design Engineer
3 weeks ago
Sunnyvale, United States Baidu Full timeResponsibilities: • Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators. • Microarchitecture development and specification. Ensure that knowledge is shared via great documentation and participation in a culture of collaborative design. • Perform initial sandbox verification,...
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Sunnyvale, United States Amazon Full timeSr. RTL Design Engineer, Hardware Compute Group Job ID: 2704182 | Amazon.com Services LLC Amazon Lab126 is an inventive research and development company that designs and engineers high-profile consumer electronics. Lab126 began in 2004 as a subsidiary of Amazon.com, Inc., originally creating the best-selling Kindle family of products. Since then, we have...
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ASIC/RTL/SOC Design Engineer
1 month ago
Sunnyvale, United States Wipro Full timeJob Title: ASIC/RTL/SOC Design EngineerDuration: Full TimeLocation: Sunnyvale, CA Description :Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience...
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ASIC/RTL/SOC Design Engineer
3 months ago
Sunnyvale, United States Wipro Full timeJob Title: ASIC/RTL/SOC Design EngineerDuration: Full TimeLocation: Sunnyvale, CA Description :Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience...
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RTL ASIC Design lead with matlab at Sunnyvale CA
2 weeks ago
Sunnyvale, United States smart folks inc Full timeJob DescriptionJob DescriptionRole : Digital Design Engineering/ RTL ASIC Design lead with matlab Location : Sunnyvale CA Full Time Position . Digital Design Engineering/RTL Design Services: ASIC design and integration familiar with lint/cdc/rdc challenges, comfortable with scripting. 1 engineer needs to be matlab-fluent (Must) Architecture and...
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RTL ASIC design engineer
5 months ago
Sunnyvale, United States Wipro Full time· Logic design /micro-architecture / RTL coding is a must.· Expertise in Verilog & System Verilog is a must.· Experience in Synthesis / Understanding of timing concepts for ASIC is required.· Experience in design of DDR / USB /SATA/ PCIe controller or such complex protocols is a plus.· Hands on experience in Multi Clock designs, Asynchronous interface...
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RTL ASIC design engineer
5 months ago
Sunnyvale, United States Wipro Full time· Logic design /micro-architecture / RTL coding is a must.· Expertise in Verilog & System Verilog is a must.· Experience in Synthesis / Understanding of timing concepts for ASIC is required.· Experience in design of DDR / USB /SATA/ PCIe controller or such complex protocols is a plus.· Hands on experience in Multi Clock designs, Asynchronous interface...
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Senior ASIC Design Engineer
2 days ago
Sunnyvale, California, United States META Full timeAbout the RoleWe are seeking a highly skilled Senior ASIC Design Engineer to join our team at Meta. As a key member of our Infrastructure organization, you will play a critical role in designing and developing cutting-edge machine learning ASICs that deliver world-class inference and training performance.ResponsibilitiesDevelop and implement advanced ASIC...
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CPU Digital Design Engineer
2 months ago
Sunnyvale, CA, United States Baidu Full timeJob Description: Design cost effective controller with high performance, low power and small area for cellular modem. This position will work with multi-nation teams in leading-edge process node and be involved in: - Perform CPU development and design integration for CPU subsystem. - Micro-architecture and design of RISC based CPU. - Explore latest...
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Senior ASIC Design Engineer
5 days ago
Sunnyvale, California, United States Amazon Services LLC Full timeAbout the RoleWe are seeking a highly skilled Senior ASIC Design Engineer to join our Hardware Compute Group at Amazon Services LLC. As a key member of our team, you will be responsible for designing and developing hardware accelerator IP to be deployed in a range of Amazon devices.Key ResponsibilitiesDesign and Development: Microarchitect and design...
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CPU Design Architect
2 months ago
Sunnyvale, CA, United States Baidu Full timeJob Description:Design cost effective controller with high performance, low power and small area for cellular modem. This position will work with multi-nation teams in leading-edge process node and be involved in: - Perform CPU development and design integration for MIPS CPU subsystem. - Explore latest technologies and be responsible for conducting...
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RTL Lead
2 months ago
Sunnyvale, United States Futran Solutions Full timeRTL Lead at Sunnyvale CARTL LeadLocation: Sunnyvale Description: Experience in Logic design /micro-architecture / RTL coding is necessary.Experience in Verilog & System Verilog is necessary.Understanding of timing concepts for ASIC is required.Experience in design of DDR / USB /SATA/ PCIe controller or such complex protocols is a plus.Hands on experience in...
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Senior FPGA Design Engineer
1 day ago
Sunnyvale, United States figure.ai Full timeFigure is an AI Robotics company developing a general purpose humanoid. Our Humanoid is designed for corporate tasks targeting labor shortages and jobs that are undesirable or unsafe. We are based in Sunnyvale, CA and require 5 days/week in-office collaboration.We are looking for an experienced FPGA Design Engineer to help us design critical hardware for our...
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RTL ASIC lead
3 weeks ago
Sunnyvale, United States Wipro Full timeSkills Required:Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”), sub-IPs, modules, and library componentsDigital design, using System Verilog and/or Verilog RTL, RTL generators (in Python), and/or high-level synthesis (“HLS”). RTL integration of SoC subsystems, IPs,...
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RTL ASIC lead
3 weeks ago
Sunnyvale, United States Wipro Full timeSkills Required:Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”), sub-IPs, modules, and library componentsDigital design, using System Verilog and/or Verilog RTL, RTL generators (in Python), and/or high-level synthesis (“HLS”). RTL integration of SoC subsystems, IPs,...
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CPU Design Architect
3 weeks ago
Sunnyvale, United States Baidu Full timeJob Description:Design cost effective controller with high performance, low power and small area for cellular modem. This position will work with multi-nation teams in leading-edge process node and be involved in: - Perform CPU development and design integration for MIPS CPU subsystem. - Explore latest technologies and be responsible for conducting...
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CPU Digital Design Engineer
14 hours ago
Sunnyvale, California, United States Baidu Full timeJob Title: CPU Digital Design EngineerBaidu is seeking a highly skilled CPU Digital Design Engineer to join our team. As a key member of our CPU design team, you will be responsible for designing and developing cost-effective controllers with high performance, low power, and small area for cellular modems.Key Responsibilities:Perform CPU development and...
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Lead ASIC Digital Design Engineer
2 days ago
Sunnyvale, California, United States Synopsys Full timeJob Description**About the Role**Synopsys is seeking a highly skilled Senior ASIC Digital Design Engineer to join our Solution Group, DDRPHY IP team. As a key member of our team, you will be responsible for innovating and developing the latest world-class market-leading DesignWare DDRPHY IP solution.Key Responsibilities:Digital Microarchitecture Definition...
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Design Verification Engineer
2 weeks ago
Sunnyvale, United States Programmers.io Full timeTitle – Design Verification EngineerLocation- Sunnyvale, CA and Austin, TXTerm- FulltimeJob Description:Design Verification Engineering ServicesTestbench development – System Verilog Universal Methodology (“UVM”), Python, and C testsIntegration/development of C tests/Application Programming Interface (“APIs”) and software build flowIntegration of...