Current jobs related to RTL ASIC lead - Sunnyvale - Wipro

  • Senior RTL ASIC Design Engineer

    1 week ago

    sunnyvale, United States ManpowerGroup Full time

    Work location : Sunnyavale CA/ Austin TXNote: We are looking for RTL ASIC front end designers only, not FPGA DesignKeywords: RTL ASIC design, SOC design, IP design, Lint, CDC, RTL Architecture designExperience : 8 - 15 YearsJD:Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”),...

  • Senior RTL ASIC Design Engineer

    1 week ago

    Sunnyvale, United States ManpowerGroup Full time

    Work location : Sunnyavale CA/ Austin TXNote: We are looking for RTL ASIC front end designers only, not FPGA DesignKeywords: RTL ASIC design, SOC design, IP design, Lint, CDC, RTL Architecture designExperience : 8 - 15 YearsJD:Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”),...

  • Senior RTL ASIC Design Engineer

    7 days ago

    sunnyvale, United States ManpowerGroup Full time

    Work location : Sunnyavale CA/ Austin TXNote: We are looking for RTL ASIC front end designers only, not FPGA DesignKeywords: RTL ASIC design, SOC design, IP design, Lint, CDC, RTL Architecture designExperience : 8 - 15 YearsJD:Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”),...

  • ASIC/RTL/SOC Design Engineer

    5 months ago

    Sunnyvale, United States Wipro Full time

    Job Title: ASIC/RTL/SOC Design EngineerDuration: Full TimeLocation: Sunnyvale, CA Description :Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience...

  • ASIC/RTL/SOC Design Engineer

    2 weeks ago

    sunnyvale, United States Wipro Full time

    Job Title: ASIC/RTL/SOC Design EngineerDuration: Full TimeLocation: Sunnyvale, CA Description :Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience...

  • Senior RTL Design Engineer

    2 weeks ago

    Sunnyvale, United States Innova Solutions Full time

    Job Summary:As an RTL ASIC Design Engineer at Innova Solutions, you will be responsible for designing and developing high-quality RTL code for complex ASICs. Your expertise in RTL design and verification will enable you to work on cutting-edge projects and collaborate with a talented team of engineers.Key Responsibilities: Design and develop RTL code for...

  • ASIC Design Engineer

    1 month ago

    Sunnyvale, California, United States Wipro Full time

    Job Title: ASIC/RTL/SOC Design EngineerWe are seeking a highly skilled ASIC/RTL/SOC Design Engineer to join our team at Wipro.Job Type: Full TimeLocation: Sunnyvale, CADescription:Design and develop complex digital circuits using Verilog and System Verilog.Expertise in synthesis and timing concepts for ASIC design is required.Experience with static checking...

  • ASIC Implementation Engineer

    1 week ago

    Sunnyvale, California, United States META Full time

    Job Title: ASIC Implementation EngineerMeta is seeking an experienced ASIC Implementation Engineer to join our Infrastructure organization. As an Implementation Engineer, you will be responsible for designing and implementing efficient System on Chip (SoC) and IP for data center applications.Responsibilities:Run Logic/Physical Synthesis using advanced...

  • ASIC Implementation Engineer

    2 weeks ago

    Sunnyvale, California, United States META Full time

    Job Title: ASIC Implementation EngineerMeta is seeking an experienced ASIC Implementation Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for designing and implementing efficient System on Chip (SoC) and IP for data center applications.Responsibilities:Run Logic/Physical Synthesis using advanced...

  • ASIC Architecture and Performance Modeling Lead

    1 week ago

    Sunnyvale, California, United States META Full time

    Job Summary:The ideal candidate will be a hands-on technical leader with experience in building C/C++ based simulators for complex ASICs. We seek a consensus-driven manager with cross-functional partnership experience and a proven track record in defining SOC Architecture, as well as building virtual platforms for functional and performance analysis of SoCs...

  • ASIC Implementation Engineer

    2 weeks ago

    Sunnyvale, California, United States META Full time

    Job Title: ASIC Implementation EngineerMeta is seeking an experienced ASIC Implementation Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for designing and implementing efficient System on Chip (SoC) and IP for data center applications.Responsibilities:Run Logic/Physical Synthesis using advanced...

  • Principal ASIC Design Engineer

    1 month ago

    Sunnyvale, California, United States Fortinet Full time

    Job DescriptionFortinet is seeking a highly skilled and experienced ASIC Designer to join our R&D team. As a key member of our team, you will be responsible for designing and developing high-performance ASICs from specification to RTL implementation. This role offers a unique opportunity to work on cutting-edge technologies and collaborate with a close-knit...

  • ASIC Implementation Engineer

    2 weeks ago

    Sunnyvale, California, United States META Full time

    Job Title: ASIC Implementation EngineerMeta is seeking a highly skilled ASIC Implementation Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for designing and implementing efficient System on Chip (SoC) and IP for data center applications.Responsibilities:Run Logic/Physical Synthesis using advanced...

  • ASIC Design Engineer

    3 weeks ago

    Sunnyvale, California, United States Meta Full time

    Job Title: ASIC Design EngineerMeta is seeking a highly skilled ASIC Design Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for designing and developing cutting-edge machine learning ASICs that deliver world-class inference and training performance.Key Responsibilities:Develop micro-architecture and RTL...

  • Senior ASIC Design Engineer

    1 month ago

    Sunnyvale, California, United States Sql Pager LLC Full time

    Job SummaryWe are seeking a highly skilled Senior ASIC Design Engineer to join our team at Sql Pager LLC. As a key member of our design team, you will be responsible for developing advanced ASICs for our automotive and data center artificial intelligence computing architecture.Key ResponsibilitiesDevelop and implement ASIC architecture and design...

  • ASIC Design Engineer

    4 weeks ago

    Sunnyvale, California, United States META Full time

    Job Title: ASIC Design EngineerMeta is seeking a highly skilled ASIC Design Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for designing and developing cutting-edge machine learning ASICs that deliver world-class inference and training performance.Responsibilities:Design and develop complex SoC and IP...

  • Principal ASIC Design Engineer

    4 weeks ago

    Sunnyvale, California, United States Fortinet Full time

    Job Title: Principal ASIC Design EngineerFortinet is seeking a highly skilled Principal ASIC Design Engineer to join our R&D team. This role involves working on cutting-edge high-performance ASIC design from specification to RTL implementation.Key Responsibilities:Develop network processing ASIC/FPGA architecture and micro-architecture specificationDesign...

  • Senior Principal ASIC Design Engineer

    2 weeks ago

    Sunnyvale, California, United States Fortinet Full time

    Job DescriptionAs a key member of Fortinet's ASIC design team, you will play a principal role in developing next-gen SOC architecture, performing IP integration, chip-level RTL design & verification, and leading low-power design methodology.Candidate must be able to work with self-motivation and deliver on commitments with challenging schedules, lead design...

  • ASIC Engineer, Implementation Specialist

    2 weeks ago

    Sunnyvale, California, United States META Full time

    Job Title: ASIC Engineer, ImplementationMeta is seeking a highly skilled ASIC Engineer, Implementation to join our Infrastructure organization. As a key member of our team, you will be responsible for designing and implementing efficient System on Chip (SoC) and IP for data center applications.Responsibilities:Run Logic/Physical Synthesis using advanced...

  • Principal ASIC Design Engineer

    4 weeks ago

    Sunnyvale, California, United States Fortinet Full time

    OverviewFortinet is seeking a highly skilled ASIC Designer to join our R&D team. This role involves working on cutting-edge high-performance ASIC design from specification to RTL implementation.The successful candidate will have direct involvement in designing complex and innovative technologies, with a large scope of experience and direct involvement with...

RTL ASIC lead

2 months ago

Sunnyvale, United States Wipro Full time

Skills Required:

  • Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”), sub-IPs, modules, and library components
  • Digital design, using System Verilog and/or Verilog RTL, RTL generators (in Python), and/or high-level synthesis (“HLS”). RTL integration of SoC subsystems, IPs, sub-IPs, modules, and library components
  • SoC-level integration
  • Support mapping of RTL on Zebu and HAPS for IP bring up and E2E validation
  • Design for low power and power intent design using Unified Power Format (“UPF”)
  • Constraint development, synthesis, timing closure, and optimization of the design
  • Code quality checks, including but not limited to Linting, Clock Domain Crossing, Reset Domain Crossing
  • Debug and bug fixes
  • Exp in Lint, CDC, spyglass tool is preferred