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Senior RTL Design Engineer
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Senior RTL ASIC Design Engineer
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Senior RTL ASIC Design Engineer
1 week ago
Sunnyvale, United States ManpowerGroup Full timeWork location : Sunnyavale CA/ Austin TXNote: We are looking for RTL ASIC front end designers only, not FPGA DesignKeywords: RTL ASIC design, SOC design, IP design, Lint, CDC, RTL Architecture designExperience : 8 - 15 YearsJD:Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”),...
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Senior RTL ASIC Design Engineer
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sunnyvale, United States ManpowerGroup Full timeWork location : Sunnyavale CA/ Austin TXNote: We are looking for RTL ASIC front end designers only, not FPGA DesignKeywords: RTL ASIC design, SOC design, IP design, Lint, CDC, RTL Architecture designExperience : 8 - 15 YearsJD:Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”),...
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FPGA Design Engineer
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Sunnyvale, California, United States HCLTech Full timeJob SummaryWe are seeking a highly skilled FPGA Design Engineer to join our team at HCLTech. The ideal candidate will have a strong background in RTL design, simulation, and implementation of FPGA-based systems.Key ResponsibilitiesPartner with cross-functional teams to design, simulate, and test embedded systems that combine electronics, mechanics, optics,...
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RTL Design Engineer
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Sunnyvale, California, United States Apple Full timeAbout the RoleWe are seeking a highly skilled RTL Design Engineer to join our growing wireless silicon development team at Apple. As a member of our team, you will be responsible for designing and developing high-performance, low-power digital circuits using SystemVerilog.Key ResponsibilitiesDesign and develop digital circuits using SystemVerilogCollaborate...
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ASIC/RTL/SOC Design Engineer
5 months ago
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RTL Design Engineer
2 weeks ago
Sunnyvale, United States Cambridge Terahertz Full timeCompany DescriptionCambridge Terahertz is a rapidly growing, venture-backed semiconductor company spun out of MIT, based in Sunnyvale, California. Recently featured in MIT News and Techcrunch, the company’s novel Terahertz imaging technology enables a wide range of impactful use cases. A true “white space” technology on the frontier of imaging...
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RTL Design Engineer
2 weeks ago
sunnyvale, United States Cambridge Terahertz Full timeCompany DescriptionCambridge Terahertz is a rapidly growing, venture-backed semiconductor company spun out of MIT, based in Sunnyvale, California. Recently featured in MIT News and Techcrunch, the company’s novel Terahertz imaging technology enables a wide range of impactful use cases. A true “white space” technology on the frontier of imaging...
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RTL Design Engineer
2 weeks ago
Sunnyvale, United States Cambridge Terahertz Full timeCompany DescriptionCambridge Terahertz is a rapidly growing, venture-backed semiconductor company spun out of MIT, based in Sunnyvale, California. Recently featured in MIT News and Techcrunch, the company’s novel Terahertz imaging technology enables a wide range of impactful use cases. A true “white space” technology on the frontier of imaging...
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Senior Physical Design Engineer
3 weeks ago
Sunnyvale, California, United States Amazon Full timeJob DescriptionWe are seeking a highly skilled Senior Physical Design Engineer to join our team at Amazon Lab126. As a key member of our startup-like team, you will be responsible for driving architectural feasibility studies, exploring power-performance-area tradeoffs, and delivering quality first-pass silicon that meets all performance, power, and area...
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Senior ASIC Design Engineer
1 month ago
Sunnyvale, California, United States Wipro Full timeJob Title: Senior ASIC Design EngineerWe are seeking a highly skilled Senior ASIC Design Engineer to join our team at Wipro. As a key member of our design team, you will be responsible for designing and developing complex ASICs for high-speed processors and other applications.Key Responsibilities:Design and develop high-speed ASICs using Verilog programming...
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Senior FPGA Design Engineer
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Senior DDR IP Design Engineer
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Senior ASIC Design Engineer
4 weeks ago
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Senior DDR IP Design Engineer
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Senior DDR IP Design Engineer
1 month ago
Sunnyvale, California, United States SpaceX Full timeJob Title: Senior DDR IP Design EngineerAt SpaceX, we're pushing the boundaries of innovation and technology. We're seeking a highly skilled Senior DDR IP Design Engineer to join our team and contribute to the development of cutting-edge memory controller IP for our SoC designs.Responsibilities:Own the high-quality release of the Memory Controller IP for...
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Senior Physical Design Engineer
3 weeks ago
Sunnyvale, California, United States Amazon Full timeJob Title: Senior Physical Design EngineerWe are seeking a highly skilled Senior Physical Design Engineer to join our Hardware Compute Group at Amazon. As a key member of our team, you will be responsible for driving architectural feasibility studies, exploring power-performance-area tradeoffs, and delivering quality first-pass silicon that meets all...
Senior RTL Design Engineer
2 months ago
Responsibilities: • Architect, design and implement new features, performance improvements, and ISA extensions in RISC-V CPU core generators. • Microarchitecture development and specification. Ensure that knowledge is shared via great documentation and participation in a culture of collaborative design. • Perform initial sandbox verification, and work with design verification team to create and execute thorough verification test plans. • Work with physical implementation team to implement and optimize physical design to meet frequency, area, power goals. • Collaborate with performance modelling team for performance exploration and optimization to meet performance goals. Requirements: • 8+ yrs of recent industry experience in high-performance, energy-efficient CPU designs. • Expertise in CPU processor designs in one or more of the following areas: instruction fetch and decode; branch prediction; register renaming and instruction scheduling; scalar and/or vector execution units; load-store unit; cache and memory subsystems. • Knowledge of RISC-V architecture is a plus. • Proficiency with hardware (RTL) design in Verilog, System Verilog, or VHDL. • Experience with Scala and/or Chisel is a plus. • Attention to detail and a focus on high-quality design. • Ability to work well with others and a belief that engineering is a team sport. • Knowledge of at least one object-oriented and/or functional programming language. • Background of successful CPU development from architecture through tapeout. • MS/ PhD degree in EE, CE, CS or a related technical discipline, or equivalent experience.