ASIC Design Engineer
6 days ago
Meta is seeking a highly skilled ASIC Design Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for designing and developing cutting-edge machine learning ASICs that deliver world-class inference and training performance.
Responsibilities:- Design and develop complex SoC and IP for data center applications
- Collaborate with verification and emulation teams to develop test plans and debug
- Work with implementation teams to close designs on timing and power
- Develop and maintain high-quality RTL code using Verilog, System Verilog, and HLS
- Optimize designs for power and performance
- 5+ years of silicon development experience
- Track record of first-pass success in ASIC development
- Experience with Verilog or System Verilog
- Experience in one of the following areas: micro-architecture and RTL development, SoC micro-architecture, design, and integration, or implementation and power methodology development
- Experience working across multiple projects
- Bachelor's degree in Computer Science, Computer Engineering, or relevant technical field
- Experience in data path development
- Experience in CPU, NOC, Memory, and Peripheral Subsystems
- Experience with HLS
- Experience with Synthesis, Timing Closure, and Formal Verification Methodology
- Experience with Power Analysis and Optimization
- Experience with scripting languages (TCL, Python, Perl, Shell-scripting)
Meta is committed to providing reasonable support in our recruiting processes for candidates with disabilities, long-term conditions, mental health conditions, or sincerely held religious beliefs, or who are neurodivergent or require pregnancy-related support.
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity, or sales incentives, if applicable.
Learn more about benefits at Meta.
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