ASIC/RTL/SOC Design Engineer

Job Title: ASIC/RTL/SOC Design EngineerDuration: Full TimeLocation: Sunnyvale, CA Description :Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience...

Job Title: ASIC/RTL/SOC Design EngineerDuration: Full TimeLocation: Sunnyvale, CA Description :Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience...

Work location : Sunnyavale CA/ Austin TXNote: We are looking for RTL ASIC front end designers only, not FPGA DesignKeywords: RTL ASIC design, SOC design, IP design, Lint, CDC, RTL Architecture designExperience : 8 - 15 YearsJD:Architecture and microarchitecture of System on a Chip (“SOC”) subsystems, Intellectual Property Functional Blocks (“IPs”),...

Job Title: ASIC Design Verification EngineerMeta is seeking an experienced ASIC Design Verification Engineer to join our Infrastructure organization. As an ASIC Design Verification Engineer, you will be responsible for developing emulation testbenches in System Verilog and/or C/C++ and delivering emulation and prototyping models from RTL on industry standard...

The “R&D Professional” team has a broad understanding in mixed-signal design, implementation, firmware, and verification. The team has experience in both back-end and front-end ASIC development flows with a mandate to provide targeted support to mixed-signal High-Bandwidth Memory (HBM) and DDRPHY IP customers. We are looking for a candidate to join the...

Job Summary:The ideal candidate will be a hands-on technical leader with experience in building C/C++ based simulators for complex ASICs. We seek a consensus-driven manager with cross-functional partnership experience and a proven track record in defining SOC Architecture, as well as building virtual platforms for functional and performance analysis of SoCs...

Company DescriptionCambridge Terahertz is a rapidly growing, venture-backed semiconductor company spun out of MIT, based in Sunnyvale, California. Recently featured in MIT News and Techcrunch, the company’s novel Terahertz imaging technology enables a wide range of impactful use cases. A true “white space” technology on the frontier of imaging...

Company DescriptionCambridge Terahertz is a rapidly growing, venture-backed semiconductor company spun out of MIT, based in Sunnyvale, California. Recently featured in MIT News and Techcrunch, the company’s novel Terahertz imaging technology enables a wide range of impactful use cases. A true “white space” technology on the frontier of imaging...

Company DescriptionCambridge Terahertz is a rapidly growing, venture-backed semiconductor company spun out of MIT, based in Sunnyvale, California. Recently featured in MIT News and Techcrunch, the company’s novel Terahertz imaging technology enables a wide range of impactful use cases. A true “white space” technology on the frontier of imaging...

Job SummaryMeta is seeking a highly skilled ASIC Physical Design Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for developing and owning physical design implementation of multi-hierarchy low-power and high-performance designs.Key ResponsibilitiesDevelop and implement physical design solutions for...

ASIC Security Digital Design EngineerFor the Security IP team in Eindhoven, we are looking for a hardware design engineer who will develop new hardware IP cores and subsystems to extend the portfolio for Security IP. In this role you would:Architecture, design and implementation of digital hardware Security IP cores and complex subsystems in RTLIn...

Job OverviewFortinet is seeking a skilled ASIC Designer to join our R&D team. This role involves designing cutting-edge high-performance ASICs from specification to RTL implementation. The successful candidate will have direct involvement in designing complex technologies and will work closely with a team of seasoned software, hardware, and network processor...

Job Title: Principal ASIC Design EngineerAbout the Role:We are seeking an experienced Principal ASIC Design Engineer to join our R&D team. As a key member of our team, you will be responsible for designing high-performance ASIC/FPGA architectures and implementing complex system-level designs.Responsibilities:Develop network processing ASIC/FPGA architecture...

Excited about working at the core of Alexa devices? Come, join us and build the latest of computer vision, machine learning, security and mobility for the Intelligent Edge devices. The ideal candidate will be technical, creative, a strong communicator, able to orchestrate a multisite development team, and drive solutions in collaboration with teams and...

Company DescriptionCambridge Terahertz is a rapidly growing, venture-backed semiconductor company spun out of MIT, based in Sunnyvale, California. Recently featured in MIT News and Techcrunch, the company’s novel Terahertz imaging technology enables a wide range of impactful use cases. A true “white space” technology on the frontier of imaging...

Job Title: Senior DDR IP Design EngineerJob Summary:SpaceX is seeking a highly skilled Senior DDR IP Design Engineer to join our team. As a key member of our Silicon Engineering group, you will be responsible for designing and developing high-performance memory controllers and PHY IPs for our next-generation SoCs. Responsibilities:• Own the high-quality...

Job Summary:The ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems.Key Responsibilities:Manage an ASIC design verification team responsible for various...

Responsibilities:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve...

Responsibilities:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve...

Responsibilities:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve...