Senior System Architect

2 days ago


Mountain View, California, United States Acceler8 Talent Full time
About the Role

We are seeking a highly skilled System Architect to join our team at Acceler8 Talent. As a key member of our organization, you will be responsible for designing and developing innovative infrastructure and networking silicon solutions.

Key Responsibilities
  • Simulation Methodologies: Develop and maintain simulation methodologies for device performance modeling, including queueing and packet processing models. Integrate functional models into simulations.
  • Model Development: Code models in C/C++, document extensively, and ensure alignment with RTL through equivalence checks.
  • Model Execution and Validation: Define methodologies and software for model execution, results logging, regression testing, and correlation with functional and RTL DV simulations.
  • Product Architecture: Lead product architecture definition and validations in areas like network/system/I/O virtualization, security, and system/board management.
  • Customer Validation: Utilize simulations for customer validation, adapting models as needed for customer and internal goals.
  • Software and Microarchitecture Requirements: Specify software and microarchitecture requirements, collaborating for timely product delivery.
  • Chip and System-Level Innovations: Drive innovations in chip and system-level solutions.
Requirements
  • Extensive Experience: Extensive experience in defining and validating processor or networking chip architectures.
  • Coding Skills: Proficiency in coding silicon/system behavioral models in C, SystemC, or C++; familiarity with ns3 or similar tools preferred.
  • Distributed Systems: Hands-on experience with distributed cluster-scale applications.
  • Infrastructure Product Execution: Proven track record in infrastructure product execution.
  • Programming Skills: Strong programming skills in C/C++; familiarity with scripting (Python, Perl) a plus.
  • Chip Architecture: Understanding of silicon chip architecture and Verilog/SystemVerilog beneficial.


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