SoC Performance Modeling Engineer for Cache Architecture

2 weeks ago


Santa Clara, California, United States Apple Full time

Job Overview:

Are you excited about developing innovative solutions to intricate technical challenges? Do you have a keen interest in understanding the detailed workings of system architectures? Join the SoC Performance team at a prominent technology firm to contribute to the design, optimization, and implementation of state-of-the-art SoCs for a variety of Apple devices, including iPhone, Apple Watch, iPad, and Macs.

Position:
SoC Cache Architecture Performance Modeling Engineer

Company:
Apple

Key Responsibilities:

  • Work collaboratively with multidisciplinary teams to improve the hardware and software architecture of chips utilizing C++ simulation tools.
  • Participate in performance modeling throughout the entire chip development cycle, from architectural design to post-silicon validation.
  • Focus on the design and application of SoC cache architecture across various components.
  • Employ C++ to refine simulation models and boost performance evaluations.
Qualifications:
  • Bachelor's degree with over 10 years of industry experience; a Master's or PhD is preferred.
  • In-depth knowledge of cache micro-architecture and on-chip interconnect systems.
  • Expertise in C++, Python, and various scripting languages.
  • Experience in SoC performance modeling and analytical techniques.
Benefits:
  • Competitive salary range from $170,700 to $300,200.
  • Opportunities for professional growth and development.
  • Comprehensive medical and dental insurance, retirement plans, and discounts on products/services.
  • Education reimbursement to support career advancement.
  • Potential bonuses, commission structures, and relocation support.


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