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Senior Logic Design Engineer, Cache Coherent Interconnects
2 months ago
NVIDIA Corporation is seeking a highly skilled Senior Logic Design Engineer to join our CPU Logic Design Team. As a member of this team, you will be responsible for designing CPU on-chip and off-chip interconnect networks, MP coherency, and last-level and system caches.
Key Responsibilities- Design and develop high-performance and low-power RTL for CPU on-chip and off-chip interconnect networks.
- Collaborate with the verification team to ensure the correctness of the designed units.
- Work with the implementation team to achieve timing, area, performance, and power goals.
- Assist with timing closure of super units.
- Master's Degree in Electrical Engineering, Computer Engineering, or Computer Science, or equivalent experience.
- 8+ years of experience in processor or other related high-performance semiconductor designs.
- Verilog expertise and a deep understanding of ASIC design flow, including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up, and lab debug.
- Strong communication and interpersonal skills, with the ability to work in a dynamic, global team.
- A strong background in computer architecture, cache coherency, or high-speed interconnects is highly desirable.
NVIDIA Corporation offers a competitive salary range of $164,000 - $356,500, based on location, experience, and the pay of employees in similar positions. You will also be eligible for equity and benefits.
About NVIDIA CorporationNVIDIA Corporation is a leader in the technology industry, pioneering accelerated computing to tackle challenges no one else can solve. Our work in AI and the metaverse is transforming the world's largest industries and profoundly impacting society.
