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ASIC Design Engineer
2 months ago
We are seeking a highly skilled ASIC Design Engineer to join our team at Apple. As a key member of our memory systems team, you will be responsible for designing and developing high-performance cache architectures for our next-generation parallel processing systems.
Key Responsibilities- Participate in the development of cache microarchitectures from specifications and model analysis.
- Explore architecture trade-offs in system performance, area, and power consumption with the performance analysis team.
- Develop and debug RTL designs of different sections of the cache.
- Collaborate with the physical design team to close timing of the cache.
- Experience in developing memory systems.
- Strong background in RTL/micro-architecture definition.
- Knowledge of PPA (performance/power/area) analysis.
- Experience with cache design, including understanding of different memory organizations and trade-offs.
- Knowledge of memory subsystems and dram controllers.
- Hands-on experience with multi-processor cache coherence protocols.
Bachelor's Degree + 10 years of experience in ASIC design and development.
Additional Requirements- Strong understanding of Apple's technology and products.
- Excellent communication and collaboration skills.
- Ability to work in a fast-paced environment and meet deadlines.
At Apple, we offer a competitive compensation package, including base pay, discretionary bonuses, and commission payments. Our benefits include comprehensive medical and dental coverage, retirement benefits, and a range of discounted products and services. We also offer reimbursement for certain educational expenses and opportunities for professional growth and development.
