Senior Verification Engineer/Leader for High-Performance ASICs
5 days ago
We are seeking a Senior Verification Engineer/Leader to join our team at Cisco Systems, Inc.
About the RoleThis is an onsite role and will require working out of our office location. You will be responsible for engaging in new development of our UCS family, with a focus on high-performance/high-volume semiconductor markets.
- Architect block, cluster and top level DV environment infrastructure.
- Create DV infrastructure from scratch for block, cluster and top level environments.
- Maintaining existing DV environments and enhancing them.
- Ensuring complete verification coverage through implementation and review of code and functional coverage.
As a key member of our team, you will work closely with designers, software teams, and other stakeholders to ensure the successful development and deployment of our ASICs.
About the RequirementsTo be considered for this role, you must have:
- 10+ years of experience in ASIC design verification, with a Bachelor's or Master's degree in equivalent experience.
- Prior experience in ASIC verification using UVM/System Verilog.
- Prior experience building test benches from scratch, hands-on experience with System Verilog constraints, structures and classes.
- Prior experience with Perl and/or Python scripting.
The estimated salary for this position is around $180,000 per year, depending on your qualifications and experience.
About Cisco Systems, Inc.Cisco Systems, Inc. is a leading networking company that delivers silicon, optics, and hardware platforms for core Switching, Routing, and Wireless products. We are committed to innovation and excellence, and we offer a unique combination of a startup culture with the benefits of working for a leading company in the world.
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