Senior RFIC Layout Specialist

2 weeks ago


Irvine, California, United States Apple Full time

Overview:

Position Summary:

Are you ready to contribute to the advancement of wireless silicon technology? The wireless silicon development team at Apple is at the forefront of creating innovative solutions that enhance user experiences through energy-efficient designs and cutting-edge technologies. Our organization encompasses a comprehensive engineering team that excels in RF/Analog architecture, VLSI/RTL design, and more.


In this position, you will collaborate closely with the RFIC design team to execute the layout and verification of custom RF and analog intellectual property for sophisticated System on Chip (SoC) products.

Key Responsibilities:

As an RF layout engineer, your responsibilities will include:

  • Creating detailed transistor-level layouts for RF and analog circuit components such as Low Noise Amplifiers (LNA), mixers, Phase-Locked Loops (PLL), and more.
  • Conducting block-level and top-level layouts through a comprehensive verification process, including extraction, Design Rule Check (DRC), Layout Versus Schematic (LVS), and Design for Manufacturing (DFM) checks.
  • Collaborating with design teams on both block-level and top-level floorplanning.
  • Performing layout reviews focusing on power and ground routing, electromigration, signal integrity, and differential matching.
  • Managing top-level layout integration and verification schedules.
Minimum Qualifications:

A Bachelor’s degree with a minimum of 3 years of relevant industry experience.

Preferred Qualifications:

Experience in custom RF/analog layout for radio transceivers, with a strong understanding of deep sub-micron CMOS technology (16nm and below, with FinFET experience required).

  • Proficient in layout techniques for device matching, minimizing parasitics, RF shielding, and high-frequency routing.
  • Solid grasp of RC delay, electromigration, and coupling effects.
  • Familiarity with guard rings, junctions, and advanced process effects.

High-level proficiency in interpreting CALIBRE DRC, ERC, LVS, etc., particularly in FinFET technology. Strong knowledge of CADENCE layout tools is essential. Excellent communication skills and the ability to work effectively with cross-functional teams are crucial.

You should also possess the capability to lead other layout engineers in top-level integration and have the ability to identify potential failure-prone circuit and layout structures, proactively collaborating with circuit designers to resolve issues. Scripting skills in PERL or SKILL are advantageous but not mandatory.

Compensation and Benefits:

At Apple, base pay is one component of our total compensation package, which is determined within a specified range. This structure allows for growth and development within your role. The base pay range for this position is between $129,600 and $236,300, influenced by your skills, qualifications, experience, and location.

Employees at Apple also have the opportunity to participate in discretionary employee stock programs, which include restricted stock unit awards and stock purchase plans at a discount.


Additional Benefits:

Comprehensive medical and dental coverage, retirement benefits, discounts on products and services, and reimbursement for educational expenses related to career advancement at Apple.

This role may also be eligible for discretionary bonuses or commission payments. Learn more about Apple’s benefits and commitment to employee welfare.


Equal Opportunity:

Apple is an equal opportunity employer dedicated to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants, regardless of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.



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