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Senior Power Engineer

1 month ago

Santa Clara, California, United States NVIDIA Full time
Job Title: Senior Emulation Power Engineer

We are seeking a highly skilled Senior Emulation Power Engineer to join our team at NVIDIA. As a key member of our Emulation Power Team, you will play a critical role in analyzing fullchip and unit-level power data, driving ASIC teams to improve their units' power efficiency, and researching, developing, and deploying methodologies to help NVIDIA's products become more energy efficient.

Key Responsibilities:
  • Develop techniques to model, analyze, and reduce power consumption of NVIDIA GPUs.
  • Collaborate with Architects, Performance Engineers, Software Engineers, ASIC Design Engineers, Product teams, and Physical Design teams to study and implement Emulation methodologies to capture Benchmark Power, perform power analysis, and case studies for NVIDIA's next generation GPUs and Tegra SOCs.
  • Use Emulation platforms like Zebu and Palladiums to emulate benchmark traces.
  • Develop testbench capabilities to fast track and automate emulation waveform captures.
  • Use internally developed tools and industry standard pre-silicon Gate-level and RTL power analysis tools to help report power.
  • Perform comparative power analysis to spot trends and anomalies that warrant more scrutiny.
  • Interact with Architects and RTL designers to help them interpret their power data and identify power bugs; drive them to implement fixes.
  • Select and run a wide variety of workloads for power analysis.
  • Prototype a new architectural feature in Verilog and analyze power.
Requirements:
  • BS or MS (or equivalent experience) with 5+ years of experience or PhD in related fields.
  • Strong analytical skills, attention to detail, systematic approach to debug, and curiosity to learn.
  • Strong coding/automation skills, preferably in Python, and/or C++.
  • Background in emulation with intent to perform hand-on debug on a daily basis.
  • Good understanding of concepts of energy consumption, estimation, data movement, and low power design.
  • Familiarity with Verilog and ASIC design principles, including knowledge of Power Artist, PTPX (Prime Power RTL, RTL Architect).
  • Good verbal/written English and interpersonal skills; much collaboration with design teams is expected.
  • Desire to bring data-driven decision-making and analytics to improve our products.
What We Offer:
  • Competitive base salary range: $128,000 - $258,750 USD.
  • Eligibility for equity and benefits.
  • Ongoing application acceptance.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. We do not discriminate on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.