Senior Memory Design Engineer

19 hours ago


Santa Clara, California, United States Ursus Inc Full time
Job Title: Senior Memory Design Engineer

Ursus Inc is seeking a highly skilled Senior Memory Design Engineer to join our team.

Job Summary

We are looking for a talented individual with 10 years of experience in custom circuit design to develop state-of-the-art custom SRAM memories, Register file memories, and compiled memories to improve circuit performance, optimize dynamic and static power, and support silicon bring up.

Responsibilities
  • Drive design and development of SRAM, register file, custom cells to enable high-performance and low-power designs
  • Work with microarchitecture team to gather specifications and drive optimal implementation
  • Conduct early sizing estimates and PPA analysis, design entry, and simulations for optimal design sizing
  • Design equivalence checking using the latest industry-standard LEC tools
  • Work closely with mask designers on custom design implementation, DFM, and yield enhancement features
  • Deliver high-quality design collateral
  • Collaborate with the CPU and SoC Physical design teams on floorplanning, placement, timing, and power closure of the custom design
  • Interact with technology team, participate in developing design and test plans
  • Collaborate with CAD teams and drive design flow enhancements
Qualifications
  • 10 years of custom circuit design experience from RTL-GDS for CPU and SoC applications
  • Prior experience and proven success of successfully designing high-performance SRAM memories, Register file memories, SRAM compilers, data path designs, and standard cells
  • Experience designing transistor-level custom circuits in advanced FinFET technology nodes
  • Solid understanding of device physics, process technology, and circuit design techniques for high-performance, low-power
  • Experience with advanced process design rules and supervising mask design
  • Knowledge developing automation for compilers and standard cells
  • Post-Silicon test and debug experience
  • Ability to work well in a team and be productive under aggressive schedules
Requirements

The ideal candidate will have a solid understanding of device physics, process technology, and circuit design techniques for high-performance, low-power designs. Experience with advanced process design rules and supervising mask design is also required. Additionally, the candidate should have knowledge developing automation for compilers and standard cells and post-Silicon test and debug experience.

We offer a competitive salary range of $160,000-$220,000 and a dynamic work environment. If you are a motivated and experienced custom circuit designer, please submit your application.



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