Electrical Engineer

6 days ago

Austin, Texas, United States Renesas Electronics Full time
Job Description

Renesas Electronics is a leading global semiconductor company that strives to develop innovative solutions for a safer, healthier, greener, and smarter world. Our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure, and IoT markets.

We are a key supplier to the world's leading manufacturers of electronics, and our robust product portfolio includes world-leading MCUs, SoCs, analog, and power products. Our Winning Combinations solutions curate these complementary products to accelerate time to market for our customers.

As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. We believe in and have a commitment to diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values.

Job Responsibilities
  • Product Definition: Play a critical role in defining new products as a key member of the cross-functional team. Analyze trade-offs, drive closure on all essential aspects, and finalize specifications for new programs to ensure competitive and timely market launches.
  • Architecture & Design: Architect, design, and integrate low-power digital circuits for mixed-signal power management products in advanced process nodes. Develop detailed specifications for execution by medium-to-large teams.
  • RTL Design: Lead and oversee digital RTL design, ensuring compliance with timing, area, power, and relevant standards specifications.
  • Design Flow Participation: Participate in all phases of the digital and mixed-signal design flow, including micro-architecture, design partitioning, RTL Verilog/SystemVerilog design, timing constraint generation, synthesis, and interaction with P&R teams. Perform timing analysis, LINT, CDC, RDC, and UPF.
  • Verification: Work closely with analog and digital verification engineers to develop complex test scenarios for pre-silicon verification.
  • AMS, DMS & Behavioral Models: Support the analog team in developing AMS, SystemVerilog, or Verilog-Real behavioral models.
  • Integration & Simulation: Integrate designs at the top level and conduct block- and top-level simulations.
  • DFT & Layout: Contribute to DFT strategy and implementation, review test case development, and collaborate with P&R teams to generate layouts that meet timing, area, and power requirements.
  • Debug & Documentation: Assist with debugging top-level test benches and running RTL and gate-level simulations. Develop comprehensive chip-level and block design documentation.
  • Design Reviews: Lead and actively participate in key design reviews, ensuring the completion of various checklists.
  • Problem Solving: Document device errata, develop work-around solutions, and implement engineering changes as needed.
  • Innovation & Strategy: Uphold and inspire high standards for cost/performance, robustness, and quality. Contribute to product strategy, definition, roadmap, and planning in collaboration with key stakeholders.
  • Cultural Leadership: Embody and promote Renesas' culture and values.
Qualifications
  • Experience: Over 20 years of digital design experience in power management, data conversion, and FSM for switching voltage regulators and DrMOS. Experience in FPGA and custom DSP is a plus.
  • Education: Degree in Electrical Engineering, Electronics, Computer Engineering, Computer Science, or a related discipline.
  • Digital Interfaces & Protocols: Proficient knowledge of digital interfaces and related protocols, including Intel VR standards, AMD SVI, Nvidia PMVID, PMBus, and AVSBus. Proven experience in releasing products incorporating these standards for mass production.
  • Power Management: Solid understanding of multiphase buck converter architecture, key IPs, and their verifications.
  • RTL Design: Fluent in Verilog/SystemVerilog RTL for digital CMOS circuit design.
  • ASIC Methodology: Strong understanding of ASIC design methodology, linting, CDC & RDC tools, and block-level & chip-level verification techniques.
  • Debugging: Proven ability to debug both RTL and gate-level simulations.
  • Automation & Mixed-Signal Design: Experience with methodology and flow automation using appropriate scripting, and familiarity with mixed-signal design methodologies.
  • Design Constraints: Experience developing design constraints and handing off to P&R teams.
  • Timing Closure & Low-Power Design: Proficient in STA and timing closure, as well as low-power design techniques, including clock and power gating (UPF).
  • Power Analysis: Experience with power analysis and optimization.
  • Advanced Verification: Familiarity with advanced verification methodologies (UVM).
  • Industry-Standard Protocols: Experience with industry-standard protocols (e.g., AMBA, I2C).
  • Language Skills: Proficiency in written and verbal English is mandatory.

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