Senior Physical Design Engineer
7 days ago
We are seeking a highly skilled Senior Physical Design Engineer to join our team at ACL Digital.
The successful candidate will be responsible for developing and implementing full chip and block constraints, as well as synthesis, STA, and timing closure using Primetime and DMSA flow.
Key Responsibilities:
- Develop and implement full chip and block constraints
- Perform synthesis, STA, and timing closure using Primetime and DMSA flow
- Run and debug Formality and VCLP Tools
- Interface with internal and external teams, including Design, IP, and Library
- Develop methodology and flow for synthesis, formal verification, STA, and timing closure
- Collaborate with the PNR and RTL design team on physical implementation and power-intent requirements
Requirements:
- Strong understanding of physical design and verification methodologies
- Experience with Primetime and DMSA flow
- Proficiency in Formality and VCLP Tools
- Excellent communication and collaboration skills
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