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Senior ASIC Physical Design Engineer

2 months ago

San Jose, California, United States Mirafra Technologies Full time
About the Role

Mirafra Technologies is seeking a highly skilled Senior Physical Design Engineer to join our team. As a key member of our design team, you will be responsible for contributing to the development of automated design methodologies for ASIC physical design.

Key Responsibilities
  • Design and implement ASIC physical design flows, including synthesis, place-and-route, and sign-off (DRC/LVS) of mixed-signal SoCs.
  • Collaborate with designers to integrate custom blocks into a digital toolflow.
  • Develop and maintain expertise in ASIC synthesis, place-and-route, verification, and sign-off tools.
  • Work with version control software, such as Git, to manage design changes and collaborate with team members.
Requirements
  • Master's degree in Electrical Engineering, Computer Engineering, or a relevant field focused on chip-level digital design (RTL and physical design).
  • At least 10 years of experience in physical design, with a strong background in ASIC synthesis, place-and-route, verification, and sign-off tools.
  • Proven ability to work independently and assume responsibility for a variety of technical tasks.
What We Offer

Mirafra Technologies offers a dynamic and challenging work environment, with opportunities for professional growth and development. If you are a motivated and experienced physical design engineer looking for a new challenge, we encourage you to apply.