Senior Design Verification Engineer

8 hours ago


San Francisco CA, United States Eximietas Design Full time

A leading technology consulting firm is seeking a Mid-Senior Design Verification Engineer to enhance UVM testbench components for IP, Subsystem, or SoC. The ideal candidate will have over 10 years of experience in Design Verification, a Bachelor's degree in Computer Science or Electrical/Electronics Engineering, and proficiency in SystemVerilog and UVM. This role demands strong analytical and debugging skills, as well as the capability to coordinate with cross-functional teams. Interested candidates may apply via email. #J-18808-Ljbffr



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