Distinguished Semiconductor Architect, Signal Integrity and Packaging

19 hours ago


Sunnyvale, California, United States Synopsys Full time

Overview

Synopsys is at the forefront of semiconductor technology, driving innovations that shape our daily lives. Our cutting-edge solutions empower customers to create high-performance silicon chips and software content.

About the Role

We are currently hiring for a Distinguished Semiconductor Architect, Signal Integrity and Packaging position in Sunnyvale, Austin, Chandler, or San Diego.

Job Summary

This role requires a highly skilled engineer with expertise in System-on-Chip (SoC) and IP architecture, CAD engineering, and signal integrity. You will develop and implement advanced methodologies and technologies, working closely with technical leaders and customers to deliver innovative solutions.

Responsibilities

  • Developing SoC/IP flows and methodologies: Utilize Ansys Multi-Physics tools and scripting design flows around tools like HFSS, SiWave, Redhawk for EM-IR (both static and dynamic), and Redhawk for thermal analysis.
  • Conducting PDN analysis: Generate CPM models, perform chip-package-PCB system simulations in both time and frequency domains.
  • Collaboration and innovation: Work with other Synopsys teams to develop and deploy packaging and signal integrity solutions.
  • Professional growth: Ramping up on new 3DIC packaging and SI tools and methodologies using Synopsys products to enable customers.

The Impact You Will Have

  • Enhancing reliability and performance: Deliver advanced packaging and signal integrity solutions that improve SoC designs.
  • Driving innovation: Develop cutting-edge methodologies and flows that drive semiconductor technology forward.
  • Contributing to success: Provide expert technical guidance and support to customer projects.
  • Improving efficiency: Automate tools and techniques to enhance chip design processes.
  • Enabling customer goals: Offer comprehensive and integrated solutions that help customers achieve their most challenging design objectives.
  • Advancing state-of-the-art: Continuously learn and adapt to stay at the forefront of semiconductor packaging and signal integrity.

What We're Looking For

  • Education: Bachelor's, Master's, or PhD in Electrical Engineering with 8+ years of experience in ASIC implementation techniques and chip assembly methodologies.
  • Signal integrity fundamentals: Strong knowledge of PDN, EMIR, basic analog circuits, T-line theory, crosstalk, S-parameters, and channel simulations.
  • Packaging expertise: Experience with 2.5/3D packaging and knowledge of CoWoS, InFo, and RDL is a plus.
  • Technical documentation: Excellent technical documentation skills.
  • Unix/Linux proficiency: Proficiency in Unix/Linux environments and the ability to run EDA tools through scripting languages.
  • Innovation and leadership: Demonstrated ability to devise innovative design solutions and lead technical projects.

Your Background and Qualifications

You are a collaborative and innovative engineer with a passion for technology and a commitment to excellence. You possess strong analytical and problem-solving skills, and you are adept at communicating complex technical concepts to diverse audiences. You are a lifelong learner, always seeking to expand your knowledge and expertise. Your ability to work effectively in cross-functional teams and your dedication to customer success make you a valuable asset to any project.

Salary Range: $140,000 - $180,000 per annum

Benefits: Comprehensive range of health, wellness, and financial benefits to cater to your needs. Total rewards include both monetary and non-monetary offerings. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education.



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