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Senior RTL Design Architect

2 months ago

Austin, Texas, United States Cadence Design Systems, Inc. Full time
Job Summary

Cadence Design Systems, Inc. is seeking an experienced RTL Design Architect to contribute to the architecture and design of next-generation SoCs targeting Hyper-Scalar, Automotive, IoT, and Mil-Aero markets.

Key Responsibilities
  • Lead the selection, configuration, and integration of CPU IP for ARM and/or RISC-V CPU and System IP.
  • Design and integrate Memory and/or Interface IP (PCIe, Ethernet, USB, and other) for SoC development.
  • Develop digital designs and create/own IP from high-level architecture specifications.
  • Collaborate with architects to create detailed micro-architecture specifications.
  • Understand performance measurement and refinement, and work with verification/validation teams to create performance verification plans.
  • Develop RTL and support verification teams in test bench development, review, and validation.
  • Ensure physical design deliverables meet power and area targets, and constraints are correct.
  • Plan and track development schedules to ensure timely IP delivery to consumers.
  • Work with multi-disciplinary teams to ensure design block/IP success for all target specifications in Silicon.
Requirements
  • USA Citizenship required; Green Card considered.
  • 10+ years of Front End design experience or a BS/MS in Engineering or Computer Sciences.
  • Rich experience in IP creation and/or SoC and IP (CPU, Memory, Interface) integration.
  • Expert in RTL design (Verilog), simulators, and debuggers.
  • Hands-on experience in Synthesis, SDC creation, and support for PD and STA teams.
  • Hands-on experience with CDC/RDC setup, cleanup, and ownership.
  • Experience in C/C++ and/or Python (or scripting language).
  • Experience driving results in multi-disciplinary organizations.
Desirable Qualifications
  • A self-motivated person with good communication and design management skills.
  • Experience with Cadence front-end toolset.