CPU RTL Design Engineer

2 days ago


Austin, Texas, United States MediaTek Full time

At MediaTek, we are a global fabless semiconductor company that enables nearly 2 billion connected devices a year. We are a market leader in developing innovative systems-on-chip (SoC) for mobile device, home entertainment, connectivity and IoT products.

Our dedication to innovation has positioned us as a driving market force in several key technology areas, including power-efficient mobile technologies, automotive solutions and advanced multimedia products. We empower and inspire people to expand their horizons and achieve their goals through smart technology, more easily and efficiently than ever before.

As a CPU RTL Design Engineer at MediaTek, you will be responsible for designing and verifying complex IP and ARM CPU subsystems. You will work with our team to develop micro-architecture, RTL coding, and synthesis of complex IP and ARM CPU subsystems. You will also run RTL quality checks to ensure the quality of the design and provide timing constraints to the Physical Design team to ensure the RTL meets timing.

We are looking for a highly skilled and experienced RTL Design Engineer to join our team. The ideal candidate will have a Master's or PhD degree in Computer Engineering or Electrical/Electronic Engineering and 2+ years of experience in RTL design of complex IP and/or CPU subsystems. You will have a good understanding of CPU architecture, logic design, synthesis, and timing, as well as proficiency in RTL coding in SystemVerilog.

Key Responsibilities:

  • Design and verify complex IP and ARM CPU subsystems
  • Develop micro-architecture and RTL coding
  • Run RTL quality checks to ensure the quality of the design
  • Provide timing constraints to the Physical Design team
  • Work with the DV team to define the test plan and verify the RTL thoroughly
  • Work with WW teams to align on the specification and deliverables

Preferred Requirements:

  • Prior industry experience in RTL design of IP and/or CPU subsystems


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