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Senior RTL Design Engineer

2 months ago

Austin, Texas, United States Apple Full time
Job Summary

At Apple, we're committed to delivering exceptional products and customer experiences through innovative design. As a Senior RTL Design Engineer, you'll play a critical role in driving the development of our best-in-class chip, working closely with cross-functional teams to deliver high-quality components on time.

Key Responsibilities
  • Collaborate with the architecture team to define the design microarchitecture hierarchy and interfaces, and develop microarchitecture specifications.
  • Develop RTL designs of one or more blocks following established design guidelines based on microarchitecture specifications, owning all aspects of RTL development and design.
  • Work with other designers in the group to deliver results, integrating common/shared IP blocks and optimizing memories/hard macros required for the block.
  • Ensure timing for the block is met by working with front-end synthesis/STA teams.
  • Work with power/performance and functional verification teams to ensure high-quality designs.
  • Collaborate with multi-disciplinary groups to ensure designs are delivered on time and with the highest quality by incorporating proper checks at every stage of the design process.
Requirements
  • A consistent track record of delivering high-quality designs in high-volume production for low-power applications.
  • Experience in driving microarchitecture and developing specifications for logic designs.
  • A consistent record of RTL design on large, sophisticated designs.
  • Solid working experience with synthesis, power, performance, and verification teams to develop and deliver high-quality RTL designs timely.
  • Strong interpersonal skills, with the ability to communicate effectively with diverse groups within the company.
  • A self-starter with a high level of motivation, organization, and schedule-driven approach.
  • Familiarity with front-end tools, including lint, CDC, synthesis, is a plus.
  • Knowledge of high-speed DRAM memory controller design or interconnect design is highly desirable.
Education and Experience

Minimum of BS + 10 years relevant industry experience.