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Semi-Custom Physical Design Engineer

2 months ago


Boston, Massachusetts, United States Apple Full time
About the Role

We are seeking a highly skilled Semi-Custom Physical Design Engineer to join our dynamic team at Apple. As a member of our Analog Mixed Signal (AMS) group, you will have the opportunity to craft innovative products that will delight millions of Apple's customers every day.

Key Responsibilities
  • Deliver semi-custom high-speed and ultra-low power physical designs of mixed-signal designs.
  • Collaborate with architecture, circuits, CAD, timing, and logic design teams to deliver outstanding Semi-Custom Physical Designs.
  • Generate block-level static timing constraints, build block-level floorplans, and develop advanced low-power clock distribution networks.
  • Perform block-level place and route, close designs to meet timing, area, and power constraints, and generate and implement ECOs to fix timing, noise, and EM IR violations.
  • Run physical design verification flows at block level and provide guidelines to fix LVS/DRC violations.
  • Participate in establishing accurate CAD and physical design methodologies by constructing designs.
  • Assist in flow development for Analog-On-Top integration and craft sophisticated layouts for mixed-signal and analog circuits in deep sub-micron CMOS technologies.
Requirements
  • Significant physical design experience on mixed-signal and/or SOC designs.
  • Deep knowledge of industry standards and practices in physical design, including physically aware synthesis, floor-planning, and place & route.
  • Deep knowledge or experience with digital signal processing filters design, analog-on-top mixed-signal physical and timing interface implementation techniques, and a passion to pursue out-of-the-box physical implementation techniques to achieve uncompromised design goals.
  • Validated experience in developing and implementing power grids and efficient clock distribution networks.
  • Significant understanding of all aspects of physical construction, integration, design-for-test (DFT), and physical verification.
  • Confirmed knowledge of basic SoC architecture and HDL languages like Verilog to collaborate with logic design teams for timing fixes.
  • Power user of industry-standard synthesis, physical design, timing, and power analysis tools.
  • Deep understanding of scripting languages such as Perl/Tcl.
  • Deep understanding and knowledge of STA methodology, constraints, and tools.
  • Solid understanding of physical design verification methodology to debug LVS/DRC issues at block level.
Preferred Qualifications
  • Bachelor's of Science in Electrical Engineering and 10+ years of experience.
About Apple

Apple is an equal opportunity employer committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics.