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Senior ASIC Design Verification Engineer

1 month ago

Santa Clara, California, United States Qualcomm Full time
Job Title: Senior ASIC Design Verification Engineer

Qualcomm is seeking a highly skilled Senior ASIC Design Verification Engineer to join our team. As a key member of our engineering group, you will be responsible for verifying our MAC Sub-System and ensuring the highest quality deliverables.

Key Responsibilities:
  • Ownership of DV test bench and other associated collaterals
  • Develop test plan and test cases to cover design feature set
  • Work closely with Design, Subsystem/SOC teams on failure debugs
  • Debug of regression signatures and identifying bug fixes
  • Responsible for Quality sign off and required documentation
Requirements:
  • Experience in HDL, verification, and general computational logic design/verification concepts
  • Experience in Verilog/System Verilog and UVM/OVM
  • Strong debugging, Analytical and problem-solving skills
  • Experience in developing Monitors, Scoreboards, Sequencers that utilize System Verilog, UVM, and/or other methodologies
Qualifications:
  • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience
  • OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience
  • OR PhD in Science, Engineering, or related field