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Senior Principal DFT Architect

1 month ago


San Jose, California, United States ARM Full time
Job Overview

Arm's Solutions group DFT team is responsible for implementing DFT for SOC for client, datacenter, automotive, and IOT line of business using the latest DFT and process technologies. We collaborate closely with Arm's partners and internal RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from early investigation to tape-out and silicon test/characterization on ATE.

Responsibilities
  • Architect DFT solutions for SOC catering to multiple line of business
  • Coordinate DFT requirements across SOC, IP, and product teams
  • Implement and validate innovative DFT techniques on SOCs and sub-systems
  • Insert DFT logic into SoC as well as sub-system level and validate all DFT features using industry standard simulation tools
  • Work closely with multi-functional teams to support DFT RTL level insertion, synthesis, and scan insertion, place-and-route, and static-timing-analysis and timing closure
  • Participate in ATE targeted test patterns, validation, and silicon-debug
  • Work closely with Test and product engineering teams on silicon characterization and validation
Required Skills and Experience
  • 16+ years of proven experience in Design for Test
  • 10+ years of experience handling DFT architecture for complex SOCs in leading technology nodes
  • Core DFT skills include Siemens DFT tools, Streaming Scan Network (SSN), Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, DFT mode timing constraints, back-annotated gate level verification, silicon debug, memory and scan diagnostics
  • Experience with 2.5D and 3D test
  • Experience coding Verilog RTL, TCL, and/or Perl
Nice To Have Skills and Experience
  • Familiarity with SoC style architectures including multi-clock domain and low power design practices
  • Previous experience managing a team of DFT Engineers
  • Familiarity with Arm IP like Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug
  • Background in design, implementation, and timing convergence
  • Experience in leading datacenter SOCs
  • Experience with Cadence and/or Synopsys DFT and simulation tools
Salary Range

$283,305 - $383,295

At Arm, we are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding. These behaviors are assessed as part of the recruitment process:

  • Partner and customer focus
  • Teamwork and communication
  • Creativity and innovation
  • Team and personal development
  • Impact and influence
  • Deliver on your promises