Senior DFT Engineer

1 week ago


San Jose, California, United States Mirafra Technologies Full time

Job Summary

We are seeking a highly skilled Digital Test Engineer to join our team at Mirafra Technologies. As a key member of our design team, you will be responsible for developing and optimizing DFT features for complex digital systems.

Key Responsibilities

  • Develop and optimize DFT features for use in complex digital systems
  • Perform structural scan and at-speed scan insertion, automatic pattern generation, and scan coverage analysis
  • Create DFT patterns for ATE to enable high volume manufacturing
  • Design and contribute to design for test (DFT) methodologies
  • Work with designers to integrate DFT flow into a digital tool flow

Requirements

  • BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related fields
  • 5+ years of work experience in DFT
  • History of assuming responsibility for a variety of technical tasks and completing projects independently
  • Proficient in Verilog for both RTL design and verification
  • Proficient in structural scan and at-speed scan design, pattern generation/verification and BIST methods
  • Proficient in ASIC DFT insertion (Cadence Genus, Cadence Modus, Siemens Tessent), and verification (NCSIM, VCS, ModelSim) tools
  • Proficient in writing timing constraints and deep understanding of timing analysis
  • Proficient in scripting or programming languages
  • Experience working with version control software, such as Git

Preferred Qualifications

  • Working knowledge of architecting DFT features for ASIC and custom blocks in a digital-top flow
  • Experience designing DFT methodologies and flows such as scan insertion, BIST, ATPG, etc.
  • Experience working on digital designs with multiple clock domains and clock dividers
  • Performed silicon bring-up, debug, and evaluation
  • Programming experience in Python

Additional Requirements

  • Knowledge of high-speed SerDes or SerDes components

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