Design Verification Specialist

6 days ago


Sunnyvale, California, United States META Full time
Design Verification Engineer

Meta Reality Labs is seeking a highly skilled Design Verification Engineer to join our team. As a key member of our Silicon team, you will play a critical role in driving the development of custom silicon for our Augmented Reality (AR) devices.

Responsibilities:
  • Collaborate with researchers and architects to define verification plans for core IP implementations
  • Develop and track detailed test plans for modules and top levels
  • Drive Design Verification to closure based on defined verification metrics
  • Debug and resolve functional failures in the design
  • Work with cross-functional teams to ensure design quality
Requirements:
  • Bachelor's degree in Computer Science, Computer Engineering, or relevant technical field
  • 5+ years of experience in Verilog, SystemVerilog, C/C++ based verification and UVM methodology
  • Experience in IP/sub-system and/or SoC level verification based on SystemVerilog UVM/OVM methodologies
  • Experience in EDA tools and scripting
Preferred Qualifications:
  • Experience in development of UVM based verification environments
  • Experience with Design verification of Data-center applications
  • Experience with low power design

At Meta, we're committed to building technologies that help people connect, find communities, and grow businesses. If you're passionate about innovation and want to be part of a team that's shaping the future of AR, we encourage you to apply.



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