ASIC Design Verification Engineer

22 hours ago


Sunnyvale, California, United States META Full time
Job Title: ASIC Design Verification Engineer

We are seeking a highly skilled ASIC Design Verification Engineer to join our team at Meta. As a key member of our Infrastructure organization, you will play a critical role in building innovative ASIC solutions for our data center applications.

Responsibilities:
  • Develop functional tests based on verification test plans and drive design verification to closure.
  • Collaborate with cross-functional teams to ensure the highest design quality.
  • Partner with design and architecture teams to debug and resolve functional failures in the design.
  • Develop and maintain verification environments using EDA tools and scripting languages.
Requirements:
  • Bachelor's degree in Computer Science, Computer Engineering, or a relevant technical field.
  • Hands-on experience with constrained-random, coverage-driven verification, and C/C++ verification.
  • Experience with EDA tools and scripting languages, such as Python, TCL, Perl, and Shell.
Preferred Qualifications:
  • Experience with SV/UVM-based verification environments and debugging tools.
  • Experience working in a CPU/GPU environment.
  • Knowledge of revision control systems, such as Mercurial, Git, or SVN.

At Meta, we are committed to providing a supportive and inclusive work environment. We offer competitive compensation and benefits, including a bonus, equity, and benefits package. If you are a motivated and detail-oriented individual with a passion for ASIC design verification, we encourage you to apply for this exciting opportunity.



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