Silicon Packaging Design Lead

6 days ago

Sunnyvale, California, United States META Full time
About the Role

META is seeking an experienced Silicon Packaging Design Engineer to join its Ecosystem and Technical Operation team. As a key member of this team, you will play a crucial role in supporting the development of custom Silicon for Infrastructure and developing packaging solutions that are optimal for our ASIC roadmap.

Responsibilities
  • Package Design: Perform package design for advanced custom silicon comprising single-chip/multi-chip and 3D or wafer packaging. This includes design feasibility studies and analyses, package design/layouts based on silicon chip IO, electrical performance and system ID/form factor requirements.
  • Collaboration: Participate in silicon architecture/package/PCB/system co-design work collaborating with downstream system design teams and upstream silicon designers to develop holistically optimal solutions.
  • Team Collaboration: Co-work with internal silicon, architecture and system teams and externally engaged partners, ASIC design partners, foundry and OSAT and substrate vendors.
  • Design Analysis: Perform design analysis and what-if scenarios for novel packaging schemes such as 2.5D/3D and heterogeneous integration to improve bandwidth, power efficiency and package form factor for next generation versions of current products.
  • Package Development: Lead package development to establish package manufacturability and reliability.
  • Team Collaboration: Collaborate with multi-functional teams within META and define package requirements.
Requirements
  • Education: Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
  • Experience: 10+ years of experience in advanced silicon packaging design.
  • Technical Skills: Experience in advanced package design and proficient in Cadence Allegro platform tools (PCB Editor, Advanced Package Designer, APD/SiP) or Mentor Xpedition platform tools.
  • SI/PI Tools: Basic understanding in one of the SI/PI tools (XtractIM, PowerSI, HFSS, Q3D, etc.), package model extraction, S-parameters and RLGC model.
  • Interposer Design: Hands-on experience in interposer or fanout package design for both organic and inorganic interposer with or without bridges.
  • Education: Bachelor's degree in Electrical engineering, Materials Engineering, Computer Engineering, relevant technical field, or equivalent practical experience.
  • Communication Skills: Proven fundamentals in the electrical/material/thermal or mechanical engineering field(s). Effective communication skills and experience working effectively with cross-functional teams.
Preferred Qualifications
  • Education: Master's or PhD degree in Electrical/Materials engineering.
  • Experience: Experience and prior experience of taking products from concept to prototyping and production.
  • Package Design: In-depth knowledge of flip chip, 2.5D and 3D and wafer packaging technologies package design.
  • CAD Tools: Familiarity with CAM350/Valor or Calibre and CAD along with experience in package design reviews.
  • High-Speed Layout: Knowledge of high-speed layout constraints (crosstalk mitigation, differential pairs, EMI/RFI, PCB/package resonance).
  • Design Rules Check: Solid understanding of Design Rules Check and Design for Manufacturing.

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