Senior ASIC Design Engineer

4 days ago


Roseville California, United States Western Digital Full time
Job Description

We are seeking a highly skilled and experienced Senior ASIC Designer to join our engineering team at Western Digital. The ideal candidate will have a strong background in both logic design, with extensive Verilog coding experience, and a good understanding of physical design.

This role involves designing, developing, and optimizing ASICs for our next-generation products, ensuring high performance, efficiency, and scalability.

Key Responsibilities:
  • Design and Implement Complex ASICs using System Verilog
  • Technical Oversight of Physical Design Process, including synthesis, floor planning, power grid design, place and route, reset/clock tree synthesis, design for manufacturability, and timing closure.
  • Collaborate with Cross-Functional Teams to define design specifications and requirements.
  • Optimize Designs for Power, Performance, and Area (PPA).
  • Micro-Architecture of the Modules you will be responsible for.
  • Micro-Architecture Documentation.
  • Work with Verification Teams to review the test plans and provide input.
  • Debug, Root Cause, and Fix Issues found in the design as part of verification testing based on simulations or FPGA testing.
  • Stay Abreast of the Latest ASIC Design Technologies and Methodologies.

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