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STA/Timing Engineer, SoC Physical Design
2 months ago
At Apple, Inc., we're seeking a highly skilled Physical Design Engineer to join our team. As a key member of our SoC Physical Design group, you will be responsible for the physical implementation of design partitions from netlist to tapeout for complex SoCs using state-of-the-art process technology.
Key Responsibilities- Collaborate with design teams to understand and debug constraints, facilitating logic changes to improve timing.
- Work closely with the Physical Design team to highlight issues and best practices.
- Develop and implement timing ECOs for project tapeout.
- Create and maintain scripts and methodologies for analysis and runs.
- Develop documentation and guidelines/specs.
- Conduct deep analysis of timing paths to identify key issues.
- Implement timing infrastructure.
- Minimum BS and 3+ years of relevant industry experience.
- Hands-on experience in STA.
- Familiarity with important aspects of timing of large high-performance SoC designs in sub-micron technologies.
- Proficiency in STA and methodologies for timing closure and a fundamental understanding of noise, crosstalk, and OCV effects among others.
- Familiarity with circuit modeling, including SPICE models and worst-case corner selection.
- Good programming skills with Perl and TCL.
- Experience with large design STA and Timing Closure.
- Familiarity with ECO techniques and implementation.
- Excellent communication skills to accurately describe issues and follow them through to completion.
At Apple, Inc., we offer a comprehensive compensation package, including base pay, discretionary bonuses, commission payments, and relocation assistance. Our benefits also include comprehensive medical and dental coverage, retirement benefits, and a range of discounted products and services.
