Physical Design Engineer

2 weeks ago


San Jose, California, United States TSMC Full time
Job Title: Physical Design Engineer

At TSMC, we are seeking a highly skilled Physical Design Engineer to join our team. As a Physical Design Engineer, you will be responsible for the physical implementation of test vehicles on TSMC's most advanced process nodes.

Key Responsibilities:
  • Physical implementation with netlist2GDS flow including block/SOC level floorplan, low power structure, power ground network, placement, clock tree synthesis, routing, design optimization.
  • Design signoff verification including RC extraction, STA, IREM, DRC, LVS, ERC, VCLP.
  • Timing closure, physical design closure, power/signal integrity closure based on the result of signoff verification.
  • Development and evaluation of the methodology and flow to achieve PPA target, power, performance and area.
  • CAD development to support design flow and quality monitoring dashboard with TCLK/TK, CSH, Python.
Requirements:
  • Master's Degree or above in Electrical Engineering or Computer Science from a top university, VLSI related course & Project preferred.
  • Strong understanding of digital circuit concepts.
  • Knowledge on physical design implementation flow, auto placement and route, static timing analysis, layout design, physical verification, IREM signoff, cad development.
  • Familiarity with CAD tools for layout, simulation, and verification.
  • Familiarity in scripting languages such as TCL, Python, CSH.
Preferred Qualifications:
  • Good communication skills and strong problem-solving skills.
  • Positive, Active, Collaborative, Self-motivated, Adaptable and Flexible.
  • Strong ability to manage demands in a fast-paced environment and diverse cultural style.
  • Hands on experience with major EDA Tools including but not limited to Primetime, Innovus, Fusion Compiler, Calibre.
  • DFT knowledge is a plus.


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