Wireless SOC Design Verification Engineer Position
3 weeks ago
Salary: $143,100 - $264,200
We're looking for a highly skilled Wireless SOC Design Verification Engineer to join our team at Apple. This role comes with the responsibility of pre-silicon RTL verification of block and top-level SOC.
The ideal candidate will have a deep understanding of High Efficiency SOC Architecture, standard SOC peripherals such as SPI, I2C, UART, Timer, DMA, memory management schemes, low-power spec, multi-processor systems, DDR, PCIe, Memory Controller Subsystems, USB, PLL, power up, Secured Boot schemes.
You will also be responsible for delivering on Power Management designs using low-power methodologies and power up-down scenarios using UPF simulations.
- Job Requirements:
- Develop coverage-driven verification plans from specifications, review, and refine to achieve coverage targets.
- Architect UVM-based highly reusable test benches and integrate complex multi-instance VIPs, subsystem test benches, and test suites to SOC level.
- Achieve targeted coverage, work with design, architecture, SW, FW, and external IP delivery teams to efficiently integrate and verify overall SOC design.
- Work closely with DV methodology architects to improve verification flow.
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