Post Silicon Debug Pathfinding Engineer

2 days ago

Santa Clara, California, United States Intel Full time
Job Description

Intel's Post Silicon Debug technology pathfinding team is responsible for next generation ion beam technology, circuit edit, and transistor probe technology developments.

The Si Debug Pathfinding program manager will help lead a broad range of research to develop and identify new technologies and methodologies to support physical debug analysis capabilities on next generation 3D package / 3DIC data center, client, and GPU products.

Responsibilities
  • Work with Intel product, process, and package pathfinding teams to identify capability needs and gaps.
  • Work with internal and external research ecosystem (Universities, National Labs, Equipment Suppliers) to identify new technologies to meet physical debug and fault isolation challenges.
  • Manage research programs and team members on research and development activities and design of experiments.
  • Work with government agencies on silicon debug strategic research initiatives
  • Execution of experiments for new generations of physical debug technologies / platforms including NG ion beam technologies, device prep technologies, and emission / irradiation based transistor probe technologies.
Additional Responsibilities
  • Collaborating with the operation support team to develop and improve new debug processes for the current and next generation process nodes.
  • Working with circuit designers, component debug, and platform validation engineering on direct write device modification and node access strategies.
  • Working with process development engineers on developing best practices for defect analysis.
Qualifications

Bachelor's or master's degree in electrical engineering, computer engineering, chemical engineering, material sciences, physics or any STEM related degree with 15+ years of related experience; or PhD degree in electrical engineering, computer engineering, chemical engineering, material sciences, physics, or any STEM related degree with 10+ years of related experience.

Desired Experience in the following areas:

  • Silicon
  • Device physics and integrated circuit knowledge.
  • Circuit design and layout.
  • Semiconductor fabrication process
  • Silicon and package physical failure analysis.
  • Circuit Edit applications or related fields.
  • Contactless probe technology:
  • e.g., IREM, LVP, LADA, LIT Thermal Imaging; OBIC, EBIC, etc.
  • Scanning Electron Microscopy, Transmission Electron Microscopy, Focused Ion Beam system operations.
  • UHV Vacuum technology.
  • Experience with government programs, e.g., DARPA, IARPA, DoD, DoC.

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