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Senior Principal Power Systems Engineer

2 months ago

Santa Clara, California, United States Oracle Full time

Job Overview - Principal Power Engineering Lead

Oracle's Hardware Development Division is seeking a seasoned System Power Engineering Technical Lead and Board Power Electrical Design Engineer to contribute to our Server Development team. In this role, you will have the chance to design, architect, and integrate power delivery subsystems for cutting-edge Servers utilizing the latest merchant silicon technologies for computing, storage, and communication.

The power demands of our next-generation Oracle servers are substantial, with a growing emphasis on efficient solutions for cloud and integrated rack-level architectures. As a Technical Lead in Electrical Design focusing on Power, you will oversee the architecture of power subsystems and board-level designs, lead the power engineering team, and manage detailed design processes. You will be responsible for the power design across all phases of product development, ensuring a smooth transition to mass production. Staying updated on the latest advancements in power delivery will be crucial, as you will need to implement these innovations into reliable power delivery systems for Oracle's offerings. Occasionally, you may provide insights on power systems from previous products developed by the hardware organization.

Key Responsibilities:

Responsibilities may include, but are not limited to:

  • Providing technical leadership to a small team of power engineers.
  • Engaging in discussions regarding rack-level, system, and board-level power architecture and design.
  • Collaborating with power engineers to establish design timelines for prototypes.
  • Creating and updating presentations for management regarding project progress.
  • Developing top-tier power designs based on performance metrics, component availability, and cost considerations.
  1. Designing and testing high-power multi-phase Voltage Regulator Down (VRD) designs that fulfill or surpass the stringent performance criteria of next-generation third-party CPUs, including parts selection and qualification.
  2. Conducting schematic capture.
  3. Performing design analysis and modeling.
  4. Planning board layouts.
  5. Guiding CAD designers in placement and routing.
  6. Reviewing CAD work in detail.
  7. Leading and participating in formal design evaluations.
  8. Authoring specifications.
  9. Publishing bills of materials.
  10. Collaborating with VRD Controller and Power Stage vendors to create and test configuration files.
  • Designing, testing, and optimizing analog and digital DC-DC converters with power ratings from 500mA to 600A, along with Electronic Circuit Breakers.
  • Establishing and maintaining automation platforms for validating power designs.
  • Designing and validating comprehensive power solutions for Oracle's next-generation server systems.
  • Working with various internal teams to ensure that power requirements for systems and VRDs meet specifications.
  • Collaborating with internal firmware and software teams to implement system-level diagnostics.
  • Coordinating with external vendors to ensure that power components meet necessary specifications and regulatory standards.
  • Bringing up and testing prototypes.
  • Developing and executing test plans.
  • Mentoring junior Power Engineers.
  • Leading lab debugging of hardware issues.

Required Skills and Experience:

Qualifications include:

  • Proven experience as a technical lead for a small team of power engineers.
  • Expertise in system-level power distribution and architecture from rack to chip level.
  1. Experience in designing high-power on-board modern multi-phase VRD designs, DC-DC converters, voltage regulators, and electronic circuit breakers. Familiarity with I2C/PMBUS/SVID communication protocols is preferred.
  2. Knowledge of analog and digital PWM control architectures.
  3. Experience with power simulation tools such as SPICE, Simplis, and Cadence PowerSI is advantageous.
  • Strong understanding and application of high-speed design methodologies for Power Integrity and Signal Integrity.
  • Proficiency in the complete flow of CAD design tools, including Cadence, Concept, and Allegro.
  • Experience with constraint-driven design methodologies.
  • Familiarity with the power requirements of high-performance CPU processors, GPUs, DDR memory DIMMs, PCIe cards, flash modules, and disk drives.
  • Experience with DC-DC control loop tuning for stability and transient performance.
  • Understanding of effective PCB stack-up design.
  • Excellent communication and leadership abilities.
  • Experience with recent Intel and AMD chipsets is a plus.
  • Familiarity with digital or analog simulation is an advantage.