Senior ASIC Physical Design PPA Engineer

2 days ago


Austin, Texas, United States Apple Full time
Role Summary

We are seeking a highly motivated Senior ASIC Physical Design PPA Engineer to join our dynamic and growing Digital Design Engineering group. As a key member of our team, you will play a strategic role in designing state-of-the-art ASICs and driving innovation in our SOC design effort.

Key Responsibilities

As a Physical Design PPA Engineer, you will be responsible for generating automation and infrastructure to scale and improve the efficiency and reliability of the PPA regression and problems. You will work closely with CAD and design teams to drive improvements and updates in our production design flows. Additionally, you will collaborate cross-functionally with design, power, post-silicon, and CAD teams to deliver on PPA goals.

Requirements

We are looking for applicants with a strong understanding of the RTL2GDSII flow and concepts related to synthesis, place & route, CTS, timing convergence, and layout closure. Ideal candidates will have hands-on experience in PPA analysis for different physical designs and evaluating new Stdcell libraries in leading tech nodes. Familiarity with development of block/partitions for silicon validation of foundation IPs and experience with industry-standard synthesis, physical design, and STA tools are also highly desired. Strong scripting skills using Perl/Tcl and excellent written/verbal communication skills are required.

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