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Senior ASIC Physical Design Engineer

2 months ago

Austin, Texas, United States Apple Full time
Role Summary

We are seeking a highly motivated Senior ASIC Physical Design PPA Engineer to join our dynamic and growing team. As part of our Digital Design Engineering group, you will take imaginative and revolutionary ideas and determine how to turn them into reality.

Key Responsibilities
  • Apply engineering fundamentals and start from scratch if needed, bringing forward-thinking ideas to the real world.
  • Collaborate with all fields to get functional products to millions of customers quickly.
  • Integrate and come up with new insights, as well as work with a team of hardworking engineers.
  • Generate automation and infrastructure to scale and improve the efficiency and reliability of the PPA regression and problems.
  • Work with CAD and design teams to drive these improvements and updates in our production design flows in an effective and timely manner.
  • Cross-functionally collaborate with design, power, post silicon, and CAD to deliver on PPA goals.
Requirements
  • BS and a minimum of 3 years of relevant industry experience.
  • Experience with RTL2GDSII flow and concepts related to synthesis, place & route, CTS, timing convergence, layout closure.
  • Hands-on experience in PPA (Performance, Power, Area) analysis for different Physical designs and evaluate new Stdcell libraries in leading tech nodes.
  • Familiar with development of block/partitions for silicon validation of foundation IPs.
  • Good understanding of Place-and-Route design as well as associated tools/flow, ability to analyze physical databases and drive new ideas.
  • Experience with industry standard synthesis, physical design and STA tools.
  • Familiar with ASIC integration flows, including power distribution, global signal planning, I/O planning and hard IP integration.
  • Familiar with tapeout of partitions and Verification Flows like LEQ, IR/EM, Timing and DFM closure.
  • Hands-on experience with ECO implementation, both functional and timing closure.
  • Familiar with DFT insertion, and multi-mode timing constraints.
  • Strong scripting skills using Perl/Tcl.
  • Strong written/verbal communication skills.
About Apple

Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.