Senior Verification Engineer
2 weeks ago
Senior Verification Engineer - Tegra page is loaded
Senior Verification Engineer - Tegra
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locations
US, CA, Santa Clara
time type
Full time
posted on
Posted 2 Days Ago
job requisition id
JR1980777
We are now looking for a Senior Verification Engineer for our Tegra group
NVIDIA is seeking outstanding Senior Verification Engineers to verify the design and implementation of the world’s leading SoC's and GPU's. This position offers the opportunity to have real impact in a multi-layered and dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
We are a team of hardworking engineers working across the micro-architecture, design, verification, implementation, and post silicon validation of groundbreaking NVIDIA automotive and gaming console chips. We specifically focus on the backbone IPs for an ARM based System on-chip.
What You’ll Be Doing:
As a key member of our
ASIC
Verification team, you will verify the design and implementation of the industry's leading SOCs
Verification of the
ASIC
design, architecture, golden models, and micro-architecture using sophisticated verification methodologies such as UVM.
Understand the design, define the verification scope, develop the verification infrastructure, and verify the correctness of the design
Collaborate with architects, designers, and pre and post silicon verification teams to accomplish your tasks.
What We Need to See:
BS or equivalent experience in Electrical Engineering, Computer Engineering, or Computer Science or related degree required, advanced degrees (MS, PhD) a plus.
4+ years of experience in ASIC verification-related fields at IP and SOC level.
Experience in writing UVM testbench from scratch and applying constraint random methodology in UVM test environment.
Highly proficient in C/C++ and able to write C/C++ models for simulation.
Experience with assertion-based design checks, code coverage, functional coverage, test plan, and documentation.
Display strong debugging and analytical skills.
Prior experience with arbiters and/or interconnect networks is desirable.
Good scripting abilities in Perl/Python/TCL are good to have.
Strong communication skills and ability & desire to work as a great teammate are huge plus.
Experience in Testbench Build flows and Makefiles is a plus.
Ways You Can Stand Out From The Crowd:
UVM knowledge and SOC verification experience.
Ambitious and highly motivated to solve problems.
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you.
The base salary range is 128,000 USD - 258,750 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.
You will also be eligible for equity and benefits .
NVIDIA accepts applications on an ongoing basis.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
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