Senior Memory Controller Verification Engineer

NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! At Nvidia, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will partner with the...

NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! At Nvidia, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will partner with the...

NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! At Nvidia, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will partner with the...

NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! At Nvidia, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will partner with the...

NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! At Nvidia, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will partner with the...

Job Role Verification EngineerJob Type Contract Job Location Santa Clara CA (or) Job DescriptionVerification Engineer for Memory Controller Significant UVM SystemVerilog experience in complex test-benches Experience working with DRAM controller PHYs memory models is preferred Significant experience with general verification flows and metrics Excellent debug...

Job Role Verification EngineerJob Type Contract Job Location Santa Clara CA (or) Job DescriptionVerification Engineer for Memory Controller• Significant UVM SystemVerilog experience in complex test-benches• Experience working with DRAM controller PHYs memory models is preferred• Significant experience with general verification flows...

Required Qualifications 4+ years' experience required in verification. System Verilog /UVM experience (Mandatory). Good understanding of PCIe and Ethernet is needed. Engineer must have good understanding of complete verification life cycle (test plan test bench till coverage closure). Define SoC verification strategy. Good understanding of SoC life cycle....

Required Qualifications 4+ years’ experience required in verification. System Verilog /UVM experience (Mandatory). Good understanding of PCIe and Ethernet is needed. Engineer must have good understanding of complete verification life cycle (test plan test bench till coverage closure). Define SoC verification strategy. Good understanding of SoC life...

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...

About Celestial AIAs the industry strives to meet the demands of the AI workloads, bottlenecks in data transfers between processors and memory have hindered progress. The Photonic Fabric based Memory Fabric provides an optically scalable solution to the ‘Memory Wall’ problem, enabling tens of Terabytes of memory capacity at full HBM bandwidths with low...

Senior Design Verification Engineer Santa Clara CA Experience Level: 7-15 years. JOB DESCRIPTION 1 Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc. Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills. Good knowledge of EDA tools. Experience with signal...

Senior Design Verification EngineerSanta Clara CAExperience Level: 7-15 years. JOB DESCRIPTION 1Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills.Good knowledge of EDA tools. Experience with signal...

Senior Design Verification EngineerSanta Clara CAExperience Level: 7-15 years. JOB DESCRIPTION 1Knowledge of SOCs with embedded ARM CPUs, DSPs, DDR3, peripherals and interconnect protocols such as AHB, AXI, PCI Express etc.Strong HVL (UVM or SystemVerilog with OVM), C/C++, Perl, TCL programming skills.Good knowledge of EDA tools. Experience with signal...

Design Verification is an integral part of the chip design process that ensures our customers get the absolute highest quality products that meets their functional and performance requirements. The DV team at Ampere Computing comprises of stellar folks who have dedicated themselves to the art and fun of design verification. We are a tightly knitted,...

Role/Responsibilities: You will work closely with the design team to define strategy and requirements for block-level and chip-level testing infrastructure. With a thorough understanding of design intent, you will drive the verification environment and the creation of test plans for unit-level and chip-level verification, implement test benches and test...

Role/Responsibilities: You will work closely with the design team to define strategy and requirements for block-level and chip-level testing infrastructure. With a thorough understanding of design intent, you will drive the verification environment and the creation of test plans for unit-level and chip-level verification, implement test benches and test...

Astera Labs is a global leader in purpose-built connectivity solutions that unlock the full potential of cloud and AI infrastructure. Our Intelligent Connectivity Platform integrates PCIe, CXL and Ethernet semiconductor-based solutions based on a software-defined architecture that is both scalable and customizable. Inspired by trusted partnerships with...

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by...