Design Verification Engineer Autopilot AI
2 weeks ago
**Design Verification Engineer Autopilot AI (Dojo)**
????Engineering & Information Technology????Austin, Texas?? ID99530????Full-time **Role:**
The Autopilot hardware team is looking for an enthusiastic, bright verification engineer with a strong desire to learn. Responsibilities will include developing test plans, verifying and debugging various blocks on the Autopilot chip.
**Requirements:**
* 3-5 years of dedicated/hands-on ASIC DV experience.
* Experience working on block level UVM test benches - writing drivers, scoreboards, sequences, constraints, and functional coverage models
* Strong interest in understanding the architectural and micro-architectural details of a design.
* Strong interest in debugging complex issues
* Drive and adopt new verification methodologies to improve effectiveness and efficiency
* Python/Perl
* Object oriented programming concepts
* C programming is a plus
* Experience working on the memory subsystem is a plus
**Responsibilities:**
* Build UVM test benches and own the verification of an IP from start to finish. Create coverage driven verification plans from specifications. Execute, review and refine to achieve coverage targets.
* Set up regressions and triage failures. Debug and drive any design and verification bugs found, to closure.
* Work with the team to improve DV methodology and infrastructure.
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**Design Verification Engineer Autopilot AI (Dojo)**
???? Engineering & Information Technology ???? Austin, Texas ?? ID 99530 ???? Full-time **Role:**
The Autopilot hardware team is looking for an enthusiastic, bright verification engineer with a strong desire to learn. Responsibilities will include developing test plans, verifying and debugging various blocks on the Autopilot chip.
**Requirements:**
* 3-5 years of dedicated/hands-on ASIC DV experience.
* Experience working on block level UVM test benches - writing drivers, scoreboards, sequences, constraints, and functional coverage models
* Strong interest in understanding the architectural and micro-architectural details of a design.
* Strong interest in debugging complex issues
* Drive and adopt new verification methodologies to improve effectiveness and efficiency
* Python/Perl
* Object oriented programming concepts
* C programming is a plus
* Experience working on the memory subsystem is a plus
**Responsibilities:**
* Build UVM test benches and own the verification of an IP from start to finish. Create coverage driven verification plans from specifications. Execute, review and refine to achieve coverage targets.
* Set up regressions and triage failures. Debug and drive any design and verification bugs found, to closure.
* Work with the team to improve DV methodology and infrastructure.
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