Design Verification Engineer
4 weeks ago
Do you want to be part of the AI revolution? Do you want to think out of the box, thriving on challenges in AI industry and have the desire to solve them? Do you want to work with a world-class team to explore the fast-growing AI hardware opportunities and impact on AI industry?Were looking forward to you joining us to collaborate, contribute, and revolutionize AI silicon and system.DescriptionWe are looking for an experienced design verification engineer to join our SoC team at Baidus Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive in this highly technical environment. Your job responsibilities as a Design Verification Engineer will help the team to verify the functionality of Baidu's AI SoC at both block level and SoC level.You will help on UVM Testbench development, directed/constrained random test generation, failure analysis and resolution, coverage analysis, and flow development.Run RTL and gate level functional verification, debug failures, lead bug tracking, and analyze and close coverage.Work closely with the design and systems engineering teams to review specifications and architecture, extract features, define verification plan & coverage model.Support mixed-signal co-simulation using Verilog models of analog IP. Develop testbench, test cases, reference model, coverage model and automation of regression suite.Support emulation and silicon bring up debug with your smart ideas to duplicate the problem in simulation.QualificationsMinimum 5 years of experience of UVM based verification on a significantly complex project.Advanced knowledge of standard ASIC design and verification flows, simulation and testbench development.Advanced knowledge of System Verilog and the UVM methodology.Solid verification skills in problem solving, constrained random testing, coverage closure, gate level simulations, X propagation.Good practice of one scripting language (Perl, Python, Tcl) no preference.SoC and IP verification experience on either one aspect (PCIe, Ethernet, HBM, GDDR, DDR, MMU, Cache).Familiar with C/C++.Formal Verification (Model Checking, Equivalence Checking).Excellent communication skills in both English and Chinese.Culture Fit:Mission alignment: If you want to be part of a team to accomplish this great mission, we will provide you the best possible platform to do that.Self-directed: We work best with people that are driven, motivated, and aspire to greatness.Hungry to learn: We are eager to see you learn new skills and grow.Team orientation: We work in small, fast-moving teams. We watch out for each other and go after big goals together as a team.
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Design Verification Engineer
1 week ago
Sunnyvale, United States META Full timeReality Labs focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta's Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human body. Our...
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Design Verification Engineer
2 days ago
Sunnyvale, United States Meta Inc Full timeSummary: Reality Labs focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta’s Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human...
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Design Verification Engineer
2 weeks ago
Sunnyvale, United States META Full timeSummary: Reality Labs focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta’s Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human...
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Design Verification Engineer
1 month ago
Sunnyvale, United States NR Consulting Full timeJob Title: Design Verification Engineer Duration: 12 mos + Possible extension Location: : Sunnyvale CADescription:•Strong DV background (test plan development, test writing, SystemVerilog, UVM)Duties: Write and augment existing testplans. Implement testbench and scoreboards / checkers. Implement test sequences as per plan and debug failures Achieve 100%...
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Design Verification Engineer
2 days ago
Sunnyvale, United States NR Consulting Full timeJob Title: Design Verification Engineer Duration: 12 mos + Possible extension Location: : Sunnyvale CADescription:•Strong DV background (test plan development, test writing, SystemVerilog, UVM)Duties: Write and augment existing testplans. Implement testbench and scoreboards / checkers. Implement test sequences as per plan and debug failures Achieve 100%...
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ASIC Engineer, Design Verification
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Sunnyvale, United States Maxonic Full timeMaxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a ASIC EngineerJob Description:Job Title: ASIC Engineer As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook's data...
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ASIC Engineer, Design Verification
2 days ago
Sunnyvale, United States Maxonic Full timeMaxonic maintains a close and long-term relationship with our direct client. In support of their needs, we are looking for a ASIC EngineerJob Description:Job Title: ASIC Engineer As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing innovative ASIC solutions for Facebook's data...
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ASIC Engineer, Design Verification
2 weeks ago
Sunnyvale, United States META Full timeSummary: Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on...
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ASIC Engineer, Design Verification
2 days ago
Sunnyvale, United States Meta Inc Full timeSummary: Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on...
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ASIC Engineer, Design Verification
1 week ago
Sunnyvale, United States META Full timeMeta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are looking for individuals with experience in Design Verification to build IP and System On Chip (SoC) for data center applications.As a Design Verification Engineer, you will be part of a dynamic team working with the best in the industry, focused on developing...
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Sunnyvale, United States META Full timeThe ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems. ASIC Engineering Manager, Design Verification Responsibilities Manage an ASIC design...
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ASIC Engineering Manager, Design Verification
1 month ago
Sunnyvale, United States META Full timeThe ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems. ASIC Engineering Manager, Design Verification Responsibilities Manage an ASIC design...
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Sunnyvale, United States Meta Inc Full timeSummary: The ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems. Required Skills: ASIC Engineering Manager, Design Verification...
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Sunnyvale, United States META Full timeSummary: The ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems. Required Skills: ASIC Engineering Manager, Design Verification...
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Sunnyvale, United States META Full timeMeta's Reality Labs(RL) focuses on delivering Meta's vision through Augmented Reality (AR). Compute power requirements of Augmented Reality require custom silicon. Meta RL Silicon team is driving the state of the art forward with breakthrough work in computer vision, machine learning, mixed reality, graphics, displays, sensors, and new ways to map the human...
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Cellular SOC Design Verification Engineer
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AI Silicon Design Verification Engineer
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