CPU Unit Verification Engineer

The RISC-V CPU Design Verification Engineering Leader will be responsible for the pre-silicon RTL verification of high performance CPU microarchitectures going into industry leading AI/ML architecture. A strong computer architecture background and a strong foundation in verification methodology will be used to close testing coverage with high confidence....

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high...

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high...

Senior CPU Design Engineer page is loaded Senior CPU Design Engineer Apply locations US, CA, Santa Clara US, TX, Austin time type Full time posted on Posted 8 Days Ago job requisition id JR1976812 We are looking for a Senior CPU Design Engineer!NVIDIA is seeking best-in-class CPU Design Engineers to design and implement the world’s leading CPU's...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...

Looking to add DV Engineers in Irvine, San Diego and Santa Clara.On going needs additional 10 engineers in team.Position detail: SOC verificationExperience level : 5-20 yearsArchitect block and full-chip verification environments using HVLs and constrained randomtechniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog,...

Electronics/CPU/BIOS Technician Onsite Role in Santa Clara California 95054 United StatesLong Term Contract Hourly Pay: $40/hr on W2Must Have Skills: troubleshoot/debug skill from components to board level. Experience with oscilloscope, schematic, Allergo and Soldering skill.---------------Work with other engineers team to insure fixtures, set-up, operation...

Electronics/CPU/BIOS Technician Onsite Role in Santa Clara California 95054 United StatesLong Term Contract Hourly Pay: $40/hr on W2Must Have Skills: troubleshoot/debug skill from components to board level. Experience with oscilloscope, schematic, Allergo and Soldering skill.---------------Work with other engineers team to insure fixtures, set-up, operation...

Electronics/CPU/BIOS Technician Onsite Role in Santa Clara California 95054 United StatesLong Term Contract Hourly Pay: $40/hr on W2Must Have Skills: troubleshoot/debug skill from components to board level. Experience with oscilloscope, schematic, Allergo and Soldering skill.---------------Work with other engineers team to insure fixtures, set-up, operation...

JOB TITLE: Accelerator Verification Engineer LOCATION: (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins CO QUALIFICATIONS: Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and create Risc-V based computing platforms that will transform the industry. You will have the...

Role/Responsibilities: You will work closely with the design team to define strategy and requirements for block-level and chip-level testing infrastructure. With a thorough understanding of design intent, you will drive the verification environment and the creation of test plans for unit-level and chip-level verification, implement test benches and test...

JOB TITLE: Accelerator Verification EngineerLOCATION: (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins COQUALIFICATIONS:Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and create Risc-V based computing platforms that will transform the industry. You will have the...

JOB TITLE: Accelerator Verification EngineerLOCATION: (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins COQUALIFICATIONS:Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and create Risc-V based computing platforms that will transform the industry. You will have the...

JOB TITLE: Accelerator Verification EngineerLOCATION: (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins COQUALIFICATIONS:Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and create Risc-V based computing platforms that will transform the industry. You will have the...

JOB TITLE: Accelerator Verification Engineer LOCATION: (US) Santa Clara CA , Austin TX, Portland OR, Fort Collins CO QUALIFICATIONS: Join a cutting-edge hardware startup in Silicon Valley as a Silicon Verification Engineer. Our mission is to reimagine silicon and create Risc-V based computing platforms that will transform the industry. You will have the...

Senior Verification Engineer - Displays page is loaded Senior Verification Engineer - Displays Apply locations US, CA, Santa Clara time type Full time posted on Posted Today job requisition id JR1970849 We are looking for a Senior Verification Engineer to join our Display Team! NVIDIA has continuously reinvented itself over two decades. Our invention of the...

Positions are open for full-time in the areas of CPU microarchitecture and logic design, in the areas of memory management, load/store pipeline, cache, power management, debug features, and bus interface designs. We are looking for junior to mid-level of talent, from new college grads to about ten years of experience. Responsibilities Microarchitecture...

Positions are open for full-time in the areas of CPU microarchitecture and logic design, in the areas of memory management, load/store pipeline, cache, power management, debug features, and bus interface designs. We are looking for junior to mid-level of talent, from new college grads to about ten years of experience. Responsibilities Microarchitecture...

Positions are open for full-time and co-op/internship roles in the areas of formal verification of CPU, Fabric, and Accelerator design **Responsibilities**: - As a Formal Verification Engineer, you will be involved in the formal verification of the architecture and microarchitecture of a high-performance RISC-V core, a coherent fabric, and an accelerator...