CPU Microarchitecture

1 week ago


Santa Clara, United States Rival Inc Full time

Positions are open for full-time in the areas of CPU microarchitecture and logic design, in the areas of memory management, load/store pipeline, cache, power management, debug features, and bus interface designs.

We are looking for junior to mid-level of talent, from new college grads to about ten years of experience. Responsibilities

Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals Validation - support test bench development and simulation for functional and performance verification Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance Design delivery - work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power Requirements

Thorough knowledge of microprocessor architecture and microarchitecture in one or more of the following areas:memory management, load/store execution, cache and memory subsystems, bus interface, debug features, and power management Knowledge of System Verilog Experience with simulators and waveform debugging tools Knowledge of logic design principles along with timing and power implications Understanding of low power microarchitecture techniques Understanding of high performance techniques and trade-offs in a CPU microarchitecture Experience in C or C++ programming Experience using an interpretive language such as Perl or Python Education and Experience

PhD, Master’s Degree or Bachelor’s Degree in technical subject area.

#J-18808-Ljbffr



  • Santa Clara, United States Rivos Full time

    Positions are open for full-time in the areas of CPU microarchitecture and logic design, in the areas of memory management, load/store pipeline, cache, power management, debug features, and bus interface designs. We are looking for junior to mid-level of talent, from new college grads to about ten years of experience. Responsibilities Microarchitecture...


  • Santa Clara, United States Tenstorrent Inc Full time

    CPU Unit Verification Engineer will focus on the Unit/Block level verification for high-performance CPUs. The person coming into this role will help execute the verification strategy and the DV plan. This role is hybrid,based out of Austin, TX or Santa Clara, CA. Responsibilities: Execute functional and performance verification at the unit testbench level...


  • Santa Clara, United States Tenstorrent Inc Full time

    The RISC-V CPU Design Verification Engineering Leader will be responsible for the pre-silicon RTL verification of high performance CPU microarchitectures going into industry leading AI/ML architecture. A strong computer architecture background and a strong foundation in verification methodology will be used to close testing coverage with high confidence....


  • Santa Clara, United States Tenstorrent Full time

    Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high...


  • Santa Clara, United States Rivos Full time

    Positions are open for full-time and co-op/internship roles in the areas of formal verification of CPU, Fabric, and Accelerator design **Responsibilities**: - As a Formal Verification Engineer, you will be involved in the formal verification of the architecture and microarchitecture of a high-performance RISC-V core, a coherent fabric, and an accelerator...

  • Senior Memory Design Engineer

    Found in: Jooble US O C2 - 2 weeks ago


    Santa Clara, CA, United States Rival Full time

    Rivos Custom Circuits team is seeking highly motivated candidates to develop state of the art custom SRAM memories, Register file memories, and compiled memories to improve circuit performance, optimize dynamic and static power and support silicon bring up. The role will be at the center of a state-of-the art circuit design effort, interfacing with all...

  • Senior Memory Design Engineer

    Found in: Jooble US O C2 - 2 weeks ago


    Santa Clara, CA, United States Rivos Full time

    Rivos Custom Circuits team is seeking highly motivated candidates to develop state of the art custom SRAM memories, Register file memories, and compiled memories to improve circuit performance, optimize dynamic and static power and support silicon bring up. The role will be at the center of a state-of-the art circuit design effort, interfacing with all...

  • Lead SoC Architect

    Found in: beBee jobs US - 1 week ago


    Santa Clara, California, United States EnCharge AI Full time

    The SoC Architect will lead the architectural definition and development, including hardware and software, of the I/O subsystem for EnCharge AI's leading edge AI inference SoC. The I/O subsystem is expected to include PCIe interfaces with SR-IOV support for virtualization, DMA engines for high-speed data transfer between the host and the card, a memory...


  • Santa Clara, United States NVIDIA Full time

    Senior Verification Engineer - Displays page is loaded Senior Verification Engineer - Displays Apply locations US, CA, Santa Clara time type Full time posted on Posted Today job requisition id JR1970849 We are looking for a Senior Verification Engineer to join our Display Team! NVIDIA has continuously reinvented itself over two decades. Our invention of the...