ASIC Engineer, Design Verification
1 month ago
Responsibilities:
- Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification.
- Develop functional tests based on verification test plan.
- Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage.
- Debug, root-cause and resolve functional failures in the design, partnering with the Design team. Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality.
- Develop and drive continuous Design Verification improvements using the latest verification methodologies, tools and technologies from the industry.
Minimum Qualifications:
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
- 5+ years of hands-on experience in System Verilog/UVM methodology and/or C/C++ based verification.
- Track record of 'first-pass success' in ASIC development cycles.
- 5+ years of experience in IP/sub-system and/or SoC level verification based on System Verilog UVM/OVM based methodologies.
- Experience in EDA tools and scripting (Python, TCL, Perl, Shell) used to build tools and flows for verification environments.
- Experience in architecting and implementing Design Verification infrastructure and executing the full verification cycle.
Preferred Qualifications:
- Experience in development of UVM based verification environments from scratch.
- Experience verifying GPU/CPU designs.
- Experience with micro-architectural performance verification.
- Experience with Design verification of Data-center applications like Video, AI/ML and Networking designs.
- Experience with verification of ARM/RISC-V based sub-systems or SoCs.
- Experience with IP or integration verification of high-speed interfaces like PCIe, RoCE, DDR, HBM, Ethernet.
- Experience in one or more of the following areas along with functional verification - SV Assertions, Formal, Emulation.
- Experience working across and building relationships with cross-functional design, model and emulation teams.
- Experience with revision control systems like Mercurial(Hg), Git or SVN
-
ASIC Design Verification Engineer
4 weeks ago
Sunnyvale, California, United States META Full timeJob Title: ASIC Design Verification EngineerMeta is seeking an experienced ASIC Design Verification Engineer to join our Infrastructure organization. As an ASIC Design Verification Engineer, you will be responsible for developing emulation testbenches in System Verilog and/or C/C++ and delivering emulation and prototyping models from RTL on industry standard...
-
Sunnyvale, California, United States META Full timeJob Summary:The ideal candidate will be a consensus-driven leader with management and leadership experience in small to large size organizations, with comprehensive system and silicon development experience, and a proven track record of first-pass success in ASIC and Systems.Key Responsibilities:Manage an ASIC design verification team responsible for various...
-
ASIC Engineer, Design Verification
3 months ago
Sunnyvale, United States L&T Technology Services Full timeResponsibilities:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve...
-
ASIC Engineer, Design Verification
2 months ago
sunnyvale, United States L&T Technology Services Full timeResponsibilities:Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification. Develop functional tests based on verification test plan. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage. Debug, root-cause and resolve...
-
Senior ASIC Design Engineer
3 weeks ago
Sunnyvale, California, United States Sql Pager LLC Full timeJob Title: Senior ASIC Design EngineerJob Responsibilities:As a Senior ASIC Design Engineer at Sql Pager LLC, you will play a crucial role in developing cutting-edge ASICs for our automotive and data center artificial intelligence computing architecture. Your responsibilities will include participating in architecture definition and modeling, verification...
-
Sunnyvale, United States Google Inc. Full timecorporate_fare Google place Sunnyvale, CA, USAApplyMinimum Qualifications:Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.2 years of experience with industry-standard tools, languages and methodologies relevant to the development of silicon-based ICs and...
-
Principal ASIC Design Engineer
3 weeks ago
Sunnyvale, California, United States Fortinet Full timeJob Title: Principal ASIC Design EngineerAbout the Role:We are seeking an experienced Principal ASIC Design Engineer to join our R&D team. As a key member of our team, you will be responsible for designing high-performance ASIC/FPGA architectures and implementing complex system-level designs.Responsibilities:Develop network processing ASIC/FPGA architecture...
-
ASIC Verification Lead
4 weeks ago
Sunnyvale, CA, United States Sql Pager LLC Full timeJob Title: ASIC Verification LeadJob Summary:Sql Pager LLC is seeking an experienced ASIC Verification Lead to join our team. The ideal candidate will have a strong background in ASIC design and verification methodologies and flows, with a proven track record as a verification lead on several production tape-outs.Key Responsibilities:To help develop an ASIC...
-
ASIC Digital Design Staff Engineer
2 weeks ago
Sunnyvale, United States Synopsys, Inc. Full timeASIC Security Digital Design EngineerFor the Security IP team in Eindhoven, we are looking for a hardware design engineer who will develop new hardware IP cores and subsystems to extend the portfolio for Security IP. In this role you would:Architecture, design and implementation of digital hardware Security IP cores and complex subsystems in RTLIn...
-
Principal ASIC Design Engineer
4 weeks ago
Sunnyvale, CA, United States Fortinet Full timeJob OverviewFortinet is seeking a skilled ASIC Designer to join our R&D team. This role involves designing cutting-edge high-performance ASICs from specification to RTL implementation. The successful candidate will have direct involvement in designing complex technologies and will work closely with a team of seasoned software, hardware, and network processor...
-
Senior Verification Engineer
4 weeks ago
Sunnyvale, California, United States TWO95 International Full timeJob Title: Senior Verification EngineerJob Description:We are seeking a highly skilled Senior Verification Engineer to join our team at TWO95 International Inc. The ideal candidate will have a strong background in ASIC/SOC/IP verification and experience with SystemVerilog and UVM methodologies.Key Responsibilities:Design and develop verification environments...
-
Senior Design Verification Engineer
1 month ago
Sunnyvale, California, United States SpaceX Full timeJob Title: Senior Design Verification EngineerAt SpaceX, we're pushing the boundaries of innovation and technology. As a Senior Design Verification Engineer, you'll play a critical role in developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe.Our team is responsible for designing,...
-
Verification Engineer
4 days ago
Sunnyvale, United States Synopsys Full timeASIC Digital Verification Engineer, Architect/DirectorWe Are:At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance...
-
ASIC Digital Design, Staff Engineer
1 day ago
Sunnyvale, United States Synopsys, Inc. Full timeThe “R&D Professional” team has a broad understanding in mixed-signal design, implementation, firmware, and verification. The team has experience in both back-end and front-end ASIC development flows with a mandate to provide targeted support to mixed-signal High-Bandwidth Memory (HBM) and DDRPHY IP customers. We are looking for a candidate to join the...
-
Senior Verification Engineer
4 weeks ago
Sunnyvale, CA, United States TWO95 International Full timeJob Title: Senior Verification EngineerJob Summary: We are seeking a highly skilled Senior Verification Engineer to join our team at TWO95 International Inc. The ideal candidate will have a strong background in UVM and SystemVerilog verification methodologies and a proven track record of delivering high-quality results in ASIC/SOC/IP verification.Key...
-
ASIC/RTL/SOC Design Engineer
1 month ago
sunnyvale, United States Wipro Full timeJob Title: ASIC/RTL/SOC Design EngineerDuration: Full TimeLocation: Sunnyvale, CA Description :Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience...
-
ASIC/RTL/SOC Design Engineer
5 months ago
Sunnyvale, United States Wipro Full timeJob Title: ASIC/RTL/SOC Design EngineerDuration: Full TimeLocation: Sunnyvale, CA Description :Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience...
-
ASIC/RTL/SOC Design Engineer
2 months ago
sunnyvale, United States Wipro Full timeJob Title: ASIC/RTL/SOC Design EngineerDuration: Full TimeLocation: Sunnyvale, CA Description :Logic design /micro-architecture / RTL coding is a must.Expertise in Verilog & System Verilog is a must.Experience in Synthesis / Understanding of timing concepts for ASIC is required.Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience...
-
ASIC Architecture and Performance Modeling Lead
4 weeks ago
Sunnyvale, California, United States META Full timeJob Summary:The ideal candidate will be a hands-on technical leader with experience in building C/C++ based simulators for complex ASICs. We seek a consensus-driven manager with cross-functional partnership experience and a proven track record in defining SOC Architecture, as well as building virtual platforms for functional and performance analysis of SoCs...
-
Senior ASIC Physical Design Engineer
4 weeks ago
Sunnyvale, California, United States META Full timeJob SummaryMeta is seeking a highly skilled ASIC Physical Design Engineer to join our Infrastructure organization. As a key member of our team, you will be responsible for developing and owning physical design implementation of multi-hierarchy low-power and high-performance designs.Key ResponsibilitiesDevelop and implement physical design solutions for...