Senior Logic Design Engineer, Cache Coherent Interconnects
7 days ago
Senior Logic Design Engineer, Cache Coherent Interconnects page is loaded Senior Logic Design Engineer, Cache Coherent Interconnects Apply locations US, CA, Santa Clara US, TX, Austin US, OR, Hillsboro time type Full time posted on Posted 30+ Days Ago job requisition id JR1975795
We are now looking for a Senior Logic Design Engineer
A s a member of our CPU Logic Design Team, you will be responsible for the design of CPU on-chip and off-chip interconnect network, MP coherency and last-level and system caches, focusing on such tasks as micro-architectural definition, RTL coding, logic debug, synthesis and timing closure, supporting verification and implementation. This position offers you the opportunity to have real impact in a dynamic, technology-focused company impacting product lines ranging from consumer graphics to self-driving cars and the growing field of artificial intelligence. We have crafted a team of extraordinary people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing.
What you'll be doing:
As a member of our core CPU team, you'll own and be responsible for crafting and timely delivery of a specific unit on the chip.
Day to day tasks include: writing readable high performance and low power RTL, Synthesis and Timing closure, and design documentation.
Collaborate with our verification team to verify the correctness of your unit.
Work with implementation to achieve your timing, area, performance and power goals.
Assist with timing closure of super units.
What we need to see:
Master’s Degree in Electrical Engineering, Computer Engineering or Computer Science or equivalent experience.
8+ years of experience in processor or other related high performance semiconductor designs.
Verilog expertise required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis, floor-planning, ECO, bring-up & lab debug.
Strong communication and interpersonal skills are required along with the work in a dynamic, global team. Your successful track record of mentoring junior engineers and interns a huge plus.
A strong background in computer architecture, cache coherency or high speed interconnects is highly desirable.
NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most brilliant and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the fastest and most power efficient chips in their class? If so, we want to hear from you.
The base salary range is 164,000 USD - 356,500 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.You will also be eligible for equity and benefits . NVIDIA accepts applications on an ongoing basis.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law. Similar Jobs (5) Senior Logic Design Engineer– Physical Design locations 2 Locations time type Full time posted on Posted 30+ Days Ago Senior Verification Engineer - Coherent Interconnects locations 3 Locations time type Full time posted on Posted 30+ Days Ago ASIC Verification Engineer - GPU locations 3 Locations time type Full time posted on Posted 30+ Days AgoNVIDIA pioneered accelerated computing to tackle challenges no one else can solve. Our work in AI and the metaverse is transforming the world's largest industries and profoundly impacting society.
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Santa Clara, United States NVIDIA Corporation Full timeSenior Logic Design Engineer, Cache Coherent Interconnects page is loaded Senior Logic Design Engineer, Cache Coherent Interconnects Apply locations US, CA, Santa Clara US, TX, Austin US, OR, Hillsboro time type Full time posted on Posted 30+ Days Ago job requisition id JR1975795 We are now looking for a Senior Logic...
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