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Senior ASIC Design Engineer – Fabric/Interconnect Specialist

2 months ago

Santa Clara, California, United States Apple Inc. Full time
About the Role

We are seeking a highly skilled Senior ASIC Design Engineer to join our team at Apple Inc. as a Fabric/Interconnect Specialist. As a key member of our SoC Design team, you will be responsible for designing and developing the on-chip system interconnect bus for next-generation Apple SOC's.

Key Responsibilities
  • Analyze architectural requirements of next-generation on-chip fabric and define scalable interconnect components
  • Coding high-quality RTL, with embedded assertions and cover points
  • Writing detailed micro-architectural specifications
  • Work with multi-functional teams to define and implement logic IP
  • Collaborating with multi-functional teams to explore solutions to improve performance while minimizing power and area
  • Working closely with design verification and formal verification teams to debug and verify functionality and performance
Requirements
  • Extensive experience in front-end ASIC RTL digital logic design using Verilog or System Verilog
  • Tight-knit collaboration skills with excellent written and verbal communication skills
  • Familiar with multiple power domains, multiple clock domains, and asynchronous interfaces
  • Strong understanding of flow control, arbitration, on-chip interconnects, QoS, topology, and performance analysis
  • Experience in implementation tasks such as synthesis, timing, area/power analysis, linting, CDC/RDC, logic equivalence checks
  • Familiarity with flow automation scripts using Perl, Python, Makefile, and shell scripts
  • Experience in ASIC IP development using extensive flow automation a plus
What We Offer
  • Comprehensive medical and dental coverage
  • Retirement benefits
  • A range of discounted products and free services
  • Reimbursement for certain educational expenses
  • Discretionary bonuses or commission payments
  • Relocation assistance