Design Verification Engineer
3 weeks ago
Who We Are
The Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco‘s core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying silicon architecture in the market that enables customers to deploy the best-of-breed silicon from Top of Rack (TOR) switches all the way through web scale data centers and across service provider, enterprise networks, and data centers with a fully unified routing and switching portfolio. Come join us and take part in shaping Cisco‘s ground-breaking solutions by designing, developing and testing some of the most complex ASICs being developed in the industry.
Who You‘ll Work With
You will engage in dynamic collaboration with verification engineers, designers, and cross-functional teams, working together to ensure the successful verification of the ASIC throughout its lifecycle.
What You‘ll Do
You will contribute to developing Cisco‘s revolutionary data center solutions by designing industry-leading complex chips, with full exposure to all aspects of our systems and applications, including silicon, hardware, software, telemetry, and security. Specific responsibilities include:
- Architect block, cluster and top-level DV environment infrastructure.
- Develop DV infrastructure from scratch for block, cluster and top-level environments.
- Maintain and enhance existing DV environments.
- Develop test plans and tests for qualifying design at block, cluster and higher-level environments with mix of constraint random and directed stimulus.
- Ensure complete verification coverage through implementation and review of code and functional coverage.
- Ensure RTL quality with qualifying the design with Gate Level Simulations on netlist.
- Collaborate closely with designers, architects, and software teams to address and debug issues during post-silicon bring-up, ensuring seamless integration and optimal performance.
- Support testing of design in emulation.
- Oversee and manage the ASIC bring-up process.
Who You Are
The Core Hardware Business Unit is on the lookout for a driven Senior Verification Engineer to join us in developing the next generation of Silicon One ASICs. You possess a deep understanding of the full ASIC development cycle, from specification to tape-out and lab validation, with hands-on experience in RTL verification and a mastery of best industry practices. Your proven track record in high-performance, high-volume semiconductor markets speaks for itself, and you‘re ready to apply your expertise to tackle complex challenges. This is your opportunity to make a significant impact in a transformative, fast-paced industry
Minimum Qualifications
- Bachelor‘s Degree in EE, CE, or other related field.
- 7+ years of related ASIC design verification experience.
- Proficient in ASIC verification using UVM/System Verilog.
- Proficient in verifying complex blocks, clusters and top level for ASIC.
- Experience building test benches from scratch, hands on experience with System Verilog constraints, structures and classes.
- Scripting experience with Perl and/or Python.
Preferred Qualifications
- Master‘s Degree in EE or CE with 5+ years of related work experience.
- Experience with Forwarding logic/Parsers/P4.
- Experience with Veloce/Palladium/Zebu/HAPS.
- Formal verification (iev/vc formal) knowledge.
- Domain experience on one or more protocols (PCIe, Ethernet, RDMA, TCP).
Why Cisco?
#WeAreCisco. We are all unique, but collectively we bring our talents to work as a team, to develop innovative technology and power a more inclusive, digital future for everyone. How do we do it? Well, for starters - with people like you
Nearly every internet connection around the world touches Cisco. We‘re the Internet‘s optimists. Our technology makes sure the data travelling at light speed across connections does so securely, yet it‘s not what we make but what we make happen which marks us out. We‘re helping those who work in the health service to connect with patients and each other; schools, colleges and universities to teach in even the most challenging of times. We‘re helping businesses of all shapes and size to connect with their employees and customers in new ways, providing people with access to the digital skills they need and connecting the most remote parts of the world - whether through 5G, or otherwise.
We tackle whatever challenges come our way. We have each other‘s backs, we recognize our accomplishments, and we grow together. We celebrate and support one another - from big and small things in life to big career moments. And giving back is in our DNA (we get 10 days off each year to do just that).
We know that powering an inclusive future starts with us. Because without diversity and a dedication to equality, there is no moving forward. Our 30 Inclusive Communities, that bring people together around commonalities or passions, are leading the way. Together we‘re committed to learning, listening, caring for our communities, whilst supporting the most vulnerable with a collective effort to make this world a better place either with technology, or through our actions.
So, you have colorful hair? Don‘t care. Tattoos? Show off your ink. Like polka dots? That‘s cool. Pop culture geek? Many of us are. Passion for technology and world changing? Be you, with us #WeAreCisco
-
Design Verification Engineer
2 days ago
San Jose, United States Noblesoft Technologies Full timeRole : Design Verification EngineerLocation : San Jose CA (Onsite)Responsibilities:● Develop verification methodology and testbenches for digital and mixed-signal blocks● Test plan, coverage analysis and closure for parallel link and SerDes IP blocks and on-chip interconnectsBasic Qualifications:● BS, MS in Electrical Engineering, Computer Engineering,...
-
Design Verification Engineer
1 month ago
San Jose, United States Noblesoft Technologies Full timeRole : Design Verification EngineerLocation : San Jose CA (Onsite)Responsibilities:● Develop verification methodology and testbenches for digital and mixed-signal blocks● Test plan, coverage analysis and closure for parallel link and SerDes IP blocks and on-chip interconnectsBasic Qualifications:● BS, MS in Electrical Engineering, Computer Engineering,...
-
Design Verification Engineer
6 days ago
San Jose, United States ConSol Partners Full timeDesign Verification Engineer – 6 Month Contract – Hybrid Onsite in San Jose (3/4 days a week in office) The CompanyWe are currently recruiting for a well-known Electronics manufacturer, specifically for their research center which serves as a global hub for advanced innovation, driving breakthroughs in cutting-edge technology. With a strong presence...
-
Design Verification Engineer
2 days ago
San Jose, United States LanceSoft, Inc. Full timeJob Title: Design Verification EngineerLocation: San Jose, CA (Onsite)Pay rate -$100/hr on W2KEY RESPONSIBILITIES: • Define verification plan, and provide technical direction to execution teams • Comprehend AMS, Firmware and design spec. Work with other functional leads to come up with a DV plan and execute the plan. • Create UVM/SystemVerilog based...
-
Design Verification Engineer
6 days ago
San Jose, United States LanceSoft, Inc. Full timeJob Title: Design Verification EngineerLocation: San Jose, CA (Onsite)Pay rate -$100/hr on W2KEY RESPONSIBILITIES: • Define verification plan, and provide technical direction to execution teams • Comprehend AMS, Firmware and design spec. Work with other functional leads to come up with a DV plan and execute the plan. • Create UVM/SystemVerilog based...
-
Design Verification Engineer
1 month ago
San Jose, United States Bayone Full timeWe have 1 opening in Austin and another opening in either San Jose or San Diego. **Hybrid 3 to 4 day per week** Reminder NO H1B or anyone that will need a H1B Sponsorship Open to 1099 or C2C, but candidate must be a direct 1:1 with your firm. - Candidate local to the San Jose market. (Top 2 candidates only per supplier only) - Current state-of-the-art...
-
Design Verification Engineer
2 months ago
san jose, United States Mastech Digital Full timeJob Title: Senior Design Verification EngineerLocation : San Jose, CA or San Diego, CA (Hybrid)Contract RoleRequirement:BS/MS/PhD (or equivalent experience) 12+ years of relevant experience in Verification. Must have knowledge of entire testbench , flow, setup and Assigning taskVerification: Experience at all level - Block level - subsystem level.Proficient...
-
Design Verification Engineer
5 days ago
San Jose, United States Mastech Digital Full timeJob Title: Senior Design Verification EngineerLocation : San Jose, CA or San Diego, CA (Hybrid)Contract RoleRequirement:BS/MS/PhD (or equivalent experience) 12+ years of relevant experience in Verification. Must have knowledge of entire testbench , flow, setup and Assigning taskVerification: Experience at all level - Block level - subsystem level.Proficient...
-
Design Verification Engineer
3 months ago
san jose, United States Mastech Digital Full timeJob Title: Senior Design Verification EngineerLocation : San Jose, CA or San Diego, CA (Hybrid)Contract RoleRequirement:BS/MS/PhD (or equivalent experience) 12+ years of relevant experience in Verification. Must have knowledge of entire testbench , flow, setup and Assigning taskVerification: Experience at all level - Block level - subsystem level.Proficient...
-
Design Verification Engineer
2 months ago
san jose, United States Oho Group Ltd Full timeTHIS IS NOT AN ENTRY LEVEL ROLE - PLEASE NO RECENT GRADUATESA $100m+ VC backed RISC-V scale up are looking for multiple Verification Engineers as they continue to accelerate their growth this year!They are at 400 people worldwide so have already been able to circumnavigate a lot of the typical speedbumps that effect early stage companies.They have in place...
-
Design Verification Engineer
5 days ago
San Jose, United States Oho Group Ltd Full timeTHIS IS NOT AN ENTRY LEVEL ROLE - PLEASE NO RECENT GRADUATESA $100m+ VC backed RISC-V scale up are looking for multiple Verification Engineers as they continue to accelerate their growth this year!They are at 400 people worldwide so have already been able to circumnavigate a lot of the typical speedbumps that effect early stage companies.They have in place...
-
Design Verification Engineer
2 months ago
San Jose, United States Oho Group Ltd Full timeTHIS IS NOT AN ENTRY LEVEL ROLE - PLEASE NO RECENT GRADUATESA $100m+ VC backed RISC-V scale up are looking for multiple Verification Engineers as they continue to accelerate their growth this year!They are at 400 people worldwide so have already been able to circumnavigate a lot of the typical speedbumps that effect early stage companies.They have in place...
-
Silicon Design Verification Engineer
3 weeks ago
San Jose, United States Advanced Micro Devices, Inc. Full timeWHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our...
-
AI Design Verification Engineer
1 month ago
San Jose, United States Advanced Micro Devices, Inc. Full timeWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the...
-
Silicon Design Verification Engineer
4 weeks ago
San Jose, United States CareerArc Full timeWHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our...
-
Silicon Design Verification Engineer
2 weeks ago
San Jose, United States Advanced Micro Devices , Inc. Full timeWHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our...
-
Senior Design Verification Engineer
2 months ago
san jose, United States Mirafra Technologies Full timeSenior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...
-
Senior Design Verification Engineer
2 months ago
San Jose, United States Mirafra Technologies Full timeSenior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...
-
Lead Design Verification Engineer
7 days ago
San Jose, United States SQL Pager LLC Full timeJob DescriptionFull time, direct hire role at client (semiconductor company)Lead verification efforts on PCIe IPs and SoC productsArchitect and build system and unit-level UVM verification environmentWork with architects to define verification strategy and execution plansReview metrics and deliver task with high qualityAnalyze Functional, Code, and Test Plan...
-
Design Verification Engineer
7 months ago
San Jose, United States Intelliswift Software Full timeTitle: Design Verification EngineerLocation: San Jose, CA, Austin, TX, Phoenix, AZDuration: 12 Months.Pay Rate: $75 to $80/hrJob Description:Testbench development - System Verilog UVM and C testsIntegration/development of C tests/APIs and SW build flowIntegration/development of UVM mailboxes and HW/SW communication componentsTest plan developmentPower Aware...
