Design Verification Engineer

Role : Design Verification EngineerLocation : San Jose CA (Onsite)Responsibilities:● Develop verification methodology and testbenches for digital and mixed-signal blocks● Test plan, coverage analysis and closure for parallel link and SerDes IP blocks and on-chip interconnectsBasic Qualifications:● BS, MS in Electrical Engineering, Computer Engineering,...

Role : Design Verification EngineerLocation : San Jose CA (Onsite)Responsibilities:● Develop verification methodology and testbenches for digital and mixed-signal blocks● Test plan, coverage analysis and closure for parallel link and SerDes IP blocks and on-chip interconnectsBasic Qualifications:● BS, MS in Electrical Engineering, Computer Engineering,...

Design Verification Engineer – 6 Month Contract – Hybrid Onsite in San Jose (3/4 days a week in office) The CompanyWe are currently recruiting for a well-known Electronics manufacturer, specifically for their research center which serves as a global hub for advanced innovation, driving breakthroughs in cutting-edge technology. With a strong presence...

Job Title: Design Verification EngineerLocation: San Jose, CA (Onsite)Pay rate -$100/hr on W2KEY RESPONSIBILITIES: • Define verification plan, and provide technical direction to execution teams • Comprehend AMS, Firmware and design spec. Work with other functional leads to come up with a DV plan and execute the plan. • Create UVM/SystemVerilog based...

Job Title: Design Verification EngineerLocation: San Jose, CA (Onsite)Pay rate -$100/hr on W2KEY RESPONSIBILITIES: • Define verification plan, and provide technical direction to execution teams • Comprehend AMS, Firmware and design spec. Work with other functional leads to come up with a DV plan and execute the plan. • Create UVM/SystemVerilog based...

We have 1 opening in Austin and another opening in either San Jose or San Diego. **Hybrid 3 to 4 day per week** Reminder NO H1B or anyone that will need a H1B Sponsorship Open to 1099 or C2C, but candidate must be a direct 1:1 with your firm. - Candidate local to the San Jose market. (Top 2 candidates only per supplier only) - Current state-of-the-art...

Job Title: Senior Design Verification EngineerLocation : San Jose, CA or San Diego, CA (Hybrid)Contract RoleRequirement:BS/MS/PhD (or equivalent experience) 12+ years of relevant experience in Verification. Must have knowledge of entire testbench , flow, setup and Assigning taskVerification: Experience at all level - Block level - subsystem level.Proficient...

Job Title: Senior Design Verification EngineerLocation : San Jose, CA or San Diego, CA (Hybrid)Contract RoleRequirement:BS/MS/PhD (or equivalent experience) 12+ years of relevant experience in Verification. Must have knowledge of entire testbench , flow, setup and Assigning taskVerification: Experience at all level - Block level - subsystem level.Proficient...

Job Title: Senior Design Verification EngineerLocation : San Jose, CA or San Diego, CA (Hybrid)Contract RoleRequirement:BS/MS/PhD (or equivalent experience) 12+ years of relevant experience in Verification. Must have knowledge of entire testbench , flow, setup and Assigning taskVerification: Experience at all level - Block level - subsystem level.Proficient...

THIS IS NOT AN ENTRY LEVEL ROLE - PLEASE NO RECENT GRADUATESA $100m+ VC backed RISC-V scale up are looking for multiple Verification Engineers as they continue to accelerate their growth this year!They are at 400 people worldwide so have already been able to circumnavigate a lot of the typical speedbumps that effect early stage companies.They have in place...

THIS IS NOT AN ENTRY LEVEL ROLE - PLEASE NO RECENT GRADUATESA $100m+ VC backed RISC-V scale up are looking for multiple Verification Engineers as they continue to accelerate their growth this year!They are at 400 people worldwide so have already been able to circumnavigate a lot of the typical speedbumps that effect early stage companies.They have in place...

WHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our...

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the...

WHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our...

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our...

Who We AreThe Common Hardware Group (CHG) delivers the silicon, optics, and hardware platforms for Cisco‘s core Switching, Routing, and Wireless products. We design the networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations across the world. Cisco Silicon One (#CiscoSiliconOne) is the only unifying...

Senior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...

Senior DV EngineersArchitect block and full-chip verification environments using HVLs and constrained random techniques for SOCs with embedded CPUs and mixed signal interfaces. Requires UVM, System Verilog, SVA ○ Develop test plans and coverage metrics from specifications and write block and chip-level tests. ○ Debug RTL and Gate simulations and work...

Job DescriptionFull time, direct hire role at client (semiconductor company)Lead verification efforts on PCIe IPs and SoC productsArchitect and build system and unit-level UVM verification environmentWork with architects to define verification strategy and execution plansReview metrics and deliver task with high qualityAnalyze Functional, Code, and Test Plan...

Title: Design Verification EngineerLocation: San Jose, CA, Austin, TX, Phoenix, AZDuration: 12 Months.Pay Rate: $75 to $80/hrJob Description:Testbench development - System Verilog UVM and C testsIntegration/development of C tests/APIs and SW build flowIntegration/development of UVM mailboxes and HW/SW communication componentsTest plan developmentPower Aware...